Shared Probe Pad Switching for Semiconductor Chip Verification

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Solution Overview

Problem

The verification process for semiconductor chips is cumbersome due to the large number of test probe pads required, occupying significant space and complicating the process.

Innovation Solution

A device comprising a DUT circuit, switch circuit, and control circuit is used to minimize the number of test probe pads by employing a switch circuit that shares a test probe pad among DUTs, utilizing a frequency divider and decoders to connect DUTs to the probe pad one at a time, allowing for efficient verification of semiconductor chip characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a separate test probe pad is provided for each DUT circuit, then each DUT can be tested independently, but the number of test probe pads increases significantly, occupying more space and complicating the verification process

Engineering Contradiction:
Improveverification accuracyVSAvoidtest probe pad configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Multiple DUT circuits share a common test probe pad through the implementation of a probe pad sharing circuit. The verification circuit includes a first probe pad, a second probe pad, and a sharing circuit that dynamically connects either the first or second DUT circuit to the common probe pad based on control signals, thereby reducing the total number of probe pads required while maintaining independent testing capability

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs dynamic switching mechanisms including multiplexers and transmission gates that can dynamically reconfigure the connection between DUT circuits and the common probe pad. Control signals dynamically activate or deactivate specific DUT circuits for testing, enabling flexible and adaptive probe pad allocation based on testing requirements

Inventive Principle:
Principle #15Dynamics

2Ease of operation

If multiple test probe pads are provided for each DUT circuit, then independent testing is enabled, but the space occupied by test structures increases

Engineering Contradiction:
Improveindependent testing capabilityVSAvoidtest structure area
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The patent merges multiple probe pad functions into a single shared probe pad structure. The probe pad sharing circuit integrates the first probe pad, second probe pad, and switching mechanisms into a compact unified structure that serves multiple DUT circuits, significantly reducing the area required for test structures compared to providing separate dedicated probe pads for each DUT

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The common probe pad is designed with multi-functionality to serve both the first DUT circuit and the second DUT circuit through the probe pad sharing circuit. The sharing circuit enables the single probe pad to be universally accessed by different DUT circuits at different times, eliminating the need for multiple specialized probe pads

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260026316A1Device and Method for Verifying Characteristics of Semiconductor Chips
Publication Date: 2026.01.22 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20260026316A1 patent drawing
  • US20260026316A1 patent drawing
  • US20260026316A1 patent drawing

AI summary

A device includes a plurality of semiconductor chips, a device under test (DUT) circuit, a control circuit, and a switch circuit. The semiconductor chips are fabricated on a semiconductor wafer that includes one or more scribe lines. The DUT circuit is formed along at least one of the scribe lines and includes a plurality of DUTs. The switch circuit is connected between the DUT circuit and the control circuit. The control circuit generates a plurality of control signals. The switch circuit connects the DUTs to a test probe pad one at a time in response to the control signals. A method for verifying characteristics of the semiconductor chips is also disclosed.