Automatic Shared Processor Datapath Generation
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Solution Overview
Problem
Designers face challenges in manually determining the number of datapaths and logic sharing for efficient processor implementation, as introducing new operations requires reconsidering existing datapaths and logic sharing, and existing systems fail to automatically generate shared processor datapaths that satisfy designer-specified constraints like clock period and latency.
Innovation Solution
A system that automatically generates shared processor datapaths by building data-flow operand graphs, canonicalizing them, assigning pipeline schedules, collecting resource shareability data, merging seed datapaths, and identifying shareable resources to achieve efficient hardware logic implementation while adhering to constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If manual methods are used to determine datapath configuration, then designer control over specific implementation details is maintained, but the design process becomes time-consuming and difficult
Solution Approach 1:
The system performs automatic datapath generation where the computer automatically determines datapath configuration, logic sharing, and hardware resource allocation based on operation behaviors, eliminating the need for manual designer intervention in these complex decisions
Solution Approach 2:
The manual mechanical process of datapath design is replaced with an automated computer-based system that uses algorithms to analyze operation behaviors and generate optimized datapath configurations automatically
2Area of stationary object
If existing datapaths are reused for new operations, then hardware area is reduced, but the designer must reconsider and potentially redesign existing datapath configurations
Solution Approach 1:
The system identifies hardware resources that can perform multiple functions by analyzing the behavioral requirements of different operations, enabling a single hardware resource to serve multiple operations when appropriate
Solution Approach 2:
The system merges multiple operation requirements into unified datapath configurations by automatically identifying common hardware resources and combining their functionality through logical sharing mechanisms
3Productivity
If manual identification of shareable hardware resources is performed, then resource allocation can be optimized, but the process becomes difficult and time-consuming
Solution Approach 1:
The computer system automatically performs resource shareability analysis by examining operation behaviors and identifying which hardware resources can be shared, eliminating the need for manual resource identification and optimization
Solution Approach 2:
The system uses feedback from operation behavior analysis to automatically adjust and optimize resource allocation decisions, continuously improving datapath configuration based on the specific requirements of the operations being implemented
Data Source
AI summary
Systems and method for automatically generating a set of shared processor datapaths from the description of the behavior of one or more ISA operations is presented. The operations may include, for example, the standard operations of a processor necessary to support an application language such as C or C++ on the ISA. Such operations, for example, may represent a configurable processor ISA. The operations may also include one or more extension operations defined by one or more designers. Thus, a description of the behaviors of the various standard and/or extension operations that compose the ISA of an instance of a standard or configurable processor is used to automatically generate a set of shared processor datapaths that implement the behavior of those operations. In addition, certain aspects may take one or more operations as well as one or more input semantics and either re-implement the input semantics automatically, or combine the input semantics with each other or with one or more other operations to automatically generate a new set of shared processor datapaths.