Shared Queue System for PCIe Traffic Resource Optimization

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Solution Overview

Problem

Current computer bus systems face inefficiencies due to increased queue sizes and latency as data rates scale, leading to higher silicon real estate requirements and power consumption, particularly in PCIe environments, where multiple virtual channels and flow-control classes result in underutilized resources and increased latency.

Innovation Solution

Implementing a shared queue system that pools credits across flow-control classes and virtual channels, allowing for resource sharing and optimized credit management to reduce overall queue size requirements, while maintaining PCIe ordering rules and resilience against DLLP corruptions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate queues are allocated for each virtual channel and flow-control class, then communication reliability and ordering rules are maintained, but silicon area and power consumption increase due to larger queue sizes

Engineering Contradiction:
ImprovePCIe ordering rules and resilience against DLLP corruptionsVSAvoidsilicon real estate
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges multiple separate queues (one for each virtual channel and flow-control class combination) into a single shared queue structure. This consolidation allows the system to maintain the required PCIe ordering rules and resilience against DLLP corruptions while significantly reducing the total silicon area required, as the shared queue eliminates redundant queue memory across multiple virtual channels and flow-control classes.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared queue is designed to serve multiple virtual channels and flow-control classes simultaneously, making it a universal resource that replaces multiple dedicated queues. This multi-functional queue structure maintains the necessary communication reliability for different traffic types while reducing overall queue size requirements and silicon real estate.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If separate queues are allocated for each virtual channel and flow-control class, then communication reliability is maintained, but power consumption increases due to larger queue sizes

Engineering Contradiction:
ImprovePCIe ordering rules and resilience against DLLP corruptionsVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent merges multiple separate queues into a single shared queue structure, which directly reduces power consumption by eliminating the energy required to maintain and manage multiple redundant queue structures. The shared queue maintains the necessary PCIe ordering rules and resilience against DLLP corruptions while consuming less power due to its smaller overall size.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent changes the structural parameters of the queue system from multiple large queues to a single shared queue with optimized size. This parameter change reduces the total memory capacity required, which directly lowers power consumption associated with queue maintenance, while preserving the reliability requirements for PCIe ordering and DLLP corruption resilience.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If queue sizes are increased to handle multiple virtual channels and flow-control classes, then bandwidth capacity is maintained, but latency increases due to larger queue depths

Engineering Contradiction:
ImprovebandwidthVSAvoidlatency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the shared queue into multiple virtual channels and flow-control classes through logical partitioning rather than physical separation. This segmentation allows the system to maintain full bandwidth capacity across all channels while keeping individual queue depths smaller, thereby reducing latency compared to a single large monolithic queue structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent resolves the bandwidth-latency tradeoff by introducing a new dimensional organization of the queue system. Instead of increasing queue depth in one dimension to handle multiple channels, the system uses a multi-dimensional shared queue structure that allows concurrent access across virtual channels while maintaining shallow individual queue depths, thus preserving both bandwidth and reducing latency.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Reliability

If multiple separate queues are used for different traffic types, then traffic isolation and ordering are maintained, but resource utilization decreases leading to underutilized resources

Engineering Contradiction:
Improvetraffic ordering and isolationVSAvoidresource utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges multiple dedicated queues into a single shared queue while maintaining logical isolation through virtual channel and flow-control class identifiers. This merging enables dynamic resource sharing where idle queue space from one virtual channel or flow-control class can be utilized by other channels, significantly improving resource utilization while preserving traffic ordering and isolation requirements.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces dynamic resource allocation within the shared queue, allowing queue resources to be flexibly assigned and reassigned based on current traffic demands across different virtual channels and flow-control classes. This dynamic approach contrasts with static dedicated queues and enables better resource utilization while maintaining the necessary traffic isolation and ordering through logical separation mechanisms.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11818058B2Shared resources for multiple communication traffics
Publication Date: 2023.11.14 INTEL CORP
  • US11818058B2 patent drawing
  • US11818058B2 patent drawing
  • US11818058B2 patent drawing

AI summary

Systems, methods, and computer-readable media are disclosed for an apparatus coupled to a communication bus, where the apparatus includes a queue and a controller to manage operations of the queue. The queue includes a first space to store a first information for a first traffic type, with a first flow class, and for a first virtual channel of communication between a first communicating entity and a second communicating entity. The queue further includes a second space to store a second information for a second traffic type, with a second flow class, and for a second virtual channel of communication between a third communicating entity and a fourth communicating entity. The first traffic type is different from the second traffic type, the first flow class is different from the second flow class, or the first virtual channel is different from the second virtual channel. Other embodiments may be described and/or claimed.