Shared Queue Registers for SR-IOV NVM Scalability
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Solution Overview
Problem
Non-volatile memory (NVM) devices face inefficiencies in managing a growing number of virtual machines, leading to increased queue resources that are not scalable and result in high power consumption and hardware complexity due to static allocation of command and response queues.
Innovation Solution
Implementing a method for dynamically allocating resources to command and response queues by mapping them to internal shared queue registers, allowing multiple operating systems to share these resources and adapt based on changing system requirements, thereby reducing hardware logic and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of command queues and response queues is increased to support more virtual machines, then the interoperability and throughput are improved, but the hardware logic complexity and power consumption increase
Solution Approach 1:
The patent implements a universal queue register structure that can serve multiple virtual functions and operating systems. Instead of dedicating separate hardware queue registers for each VF, the system uses a shared queue register that can be dynamically assigned to different VFs based on their needs, allowing the same hardware resource to perform multiple functions.
Solution Approach 2:
The patent introduces dynamic queue allocation where the number and identification of command queues and response queues can be changed at runtime based on the number of active virtual machines and their requirements. This dynamic adjustment allows the system to adapt to varying workloads without requiring fixed hardware configuration for maximum capacity.
2Adaptability or versatility
If the number of command queues and response queues is increased to support more virtual machines, then the interoperability is improved, but the power consumption increases
Solution Approach 1:
The shared queue register structure allows multiple virtual functions to access the same hardware resource, eliminating the need for separate dedicated queue registers for each VF. This reduces the total number of active hardware circuits and consequently lowers power consumption while maintaining support for multiple virtual machines.
Solution Approach 2:
The dynamic queue allocation mechanism allows the system to activate only the necessary queue resources based on the current number of virtual machines and their operational status. When fewer VFs are active, the system can reduce the number of active queue registers, thereby lowering power consumption while maintaining full interoperability capability when needed.
3Device complexity
If a static number of queues is implemented in the NVM controller, then the hardware logic is simplified, but the scalability to support increasing number of virtual machines is reduced
Solution Approach 1:
The patent implements dynamic queue allocation where the NVM controller can create, destroy, and reassign command queues and response queues based on the number of active virtual machines. This allows the system to scale up or down without requiring changes to the base hardware logic, maintaining simplicity while achieving scalability.
Solution Approach 2:
The system uses software-based queue management that creates virtual copies of queue structures in memory rather than requiring physical duplication of hardware queue registers. This allows multiple virtual functions to share the same physical hardware resource through software abstraction, enabling scalability without increasing hardware complexity.
4Speed
If dedicated queue registers are allocated for each virtual function, then the queue processing performance is improved, but the cell area and hardware resources increase
Solution Approach 1:
The patent merges the queue register resources across multiple virtual functions into a single shared queue register. Instead of having separate dedicated registers for each VF, the system combines them into one shared resource that is dynamically assigned to different VFs, reducing the total hardware area while maintaining processing performance through efficient access control.
Solution Approach 2:
The shared queue register serves as a universal resource that can be assigned to any active virtual function. This multi-functional approach allows the same hardware area to support multiple VFs sequentially or in parallel with proper synchronization, eliminating the need for separate dedicated registers for each VF and thereby reducing the overall cell area.
Data Source
AI summary
Provided are method for dynamically allocating resources to command queues and response queues by a non-volatile memory (NVM) controller. The method includes creating command queues and response queues for at least one operating system among a plurality of operating systems running on a host system and mapping the created command queues and response queues to a plurality of internal shared queue registers. The plurality of operating systems running on the host system communicate with at least one NVM controller independently.