Shared Read Circuitry for Memory Device Mismatch Reduction
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Solution Overview
Problem
Current memory devices face challenges in reducing size and power consumption while maintaining storage capacity and access speeds, particularly due to device mismatch issues when using differential bit cells with separate preamplifiers, which leads to larger and more power-hungry sense amplifiers.
Innovation Solution
Implementing memory devices with differential bit cells that share read/write circuitry, such as PMOS-follower and NMOS-follower circuitry, to reduce device mismatch and enable smaller preamplifiers, thereby reducing overall device size and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate preamplifiers are used for each tunnel junction in differential bit cells, then device mismatch is overcome, but preamplifier area and power consumption increase
Solution Approach 1:
The patent combines the preamplifier functions into a shared circuit that serves both tunnel junctions in a differential bit cell. Instead of having separate preamplifiers for each junction, a single preamplifier is used to read both junctions, thereby reducing the total preamplifier area and power consumption while still compensating for device mismatch through differential reading techniques
Solution Approach 2:
The shared preamplifier circuit is designed to perform multiple functions: it reads both tunnel junctions in the differential bit cell, compensates for device mismatch, and maintains the required measurement precision. This multi-functional approach eliminates the need for separate dedicated preamplifiers for each junction
2Measurement precision
If separate preamplifiers are used for each tunnel junction, then device mismatch is compensated, but overall device size increases
Solution Approach 1:
The patent merges the preamplifier circuits into a shared resource that serves both tunnel junctions. This consolidation significantly reduces the total area occupied by preamplifiers in the memory device, allowing for higher density while maintaining the ability to compensate for device mismatch through the shared differential reading approach
3Quantity of substance
If more circuitry is added to handle differential bit cells, then storage capacity is maintained, but device complexity increases
Solution Approach 1:
The shared preamplifier circuit is designed to handle multiple functions including reading both tunnel junctions, compensating for device mismatch, and supporting the required storage capacity. This universal design approach maintains storage capability while avoiding the need for additional dedicated circuitry for each function
Data Source
AI summary
In some examples, a memory device may be configured to use shared read circuitry to sample a voltage drop across both a bit cell and a resistive circuit in order to perform a comparison that produces an output corresponding to the bit stored in the bit cell. The shared read circuitry can include a shared sense amplifier as well as shared N-MOS and P-MOS followers used to apply read voltages across the bit cell and resistive circuit.