Shared Redundant Memory Circuit for Array Repair

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Solution Overview

Problem

In large-scale memory devices like PCM, ReRAM, and SRAM, replacing a destructed memory cell often requires replacing the entire memory array, leading to higher costs, and existing redundant memory solutions may not be sufficient or effectively utilized.

Innovation Solution

A memory device design where multiple normal memory circuits share a redundant memory circuit, allowing redundant memory cells to replace destructed normal memory cells across different arrays, enhancing the flexibility and sufficiency of redundant memory allocation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the entire memory array is replaced when a memory cell is destructed, then the memory function is maintained, but the cost increases

Engineering Contradiction:

Improvememory functionVSAvoidcost

Core Design Contradiction:

ReliabilityVSLoss of substance

Solution Approach 1:

The memory array is segmented into multiple independent sub-arrays, each capable of being individually replaced or repaired. This allows only the affected sub-array to be replaced rather than the entire memory array, reducing material waste and cost while maintaining overall memory function.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Instead of discarding the entire memory array when one cell fails, the patent recovers and retains the functional sub-arrays. The replacement process only involves the specific failed sub-array, thereby recovering and preserving the majority of the memory resources that remain functional.

Inventive Principle:

Principle #34Discarding and recovering

2Reliability

If redundant memory cells are provided for each normal memory array, then the normal memory cell can be replaced when destructed, but the redundant memory cells may be insufficient or not effectively used

Engineering Contradiction:

Improvememory cell replacement capabilityVSAvoidredundant memory utilization

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The redundant memory cells are designed with universal functionality to serve multiple normal memory arrays. A single pool of redundant cells can replace failed cells in any of the multiple normal arrays, making the redundant memory resource adaptable and versatile across different array failures rather than being dedicated to a single array.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

Multiple normal memory arrays are merged into a shared system with a common pool of redundant memory cells. This consolidation allows the redundant cells to be dynamically allocated to any failed array, improving utilization efficiency and ensuring sufficient replacement capability without requiring separate redundant cells for each array.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS11829605B2Memory device with redundant memory circuit and repair method thereof

Publication Date: 2023.11.28 JIANGSU ADVANCED MEMORY TECH CO LTD

AI summary

A memory device includes several normal memory circuits and a redundant memory circuit is disclosed. The several normal memory circuits include several normal memory arrays. The redundant memory circuit includes a redundant memory array. The several normal memory arrays share the redundant memory array. When a first normal memory cell of a first normal memory array of the several normal memory arrays is destructed, a first redundant memory cell of the redundant memory array replaces the first normal memory cell. When a second normal memory cell of a second normal memory array of the several normal memory arrays is destructed, a second redundant memory cell of the redundant memory array replaces the second normal memory cell.