Shared Reference Column for Variable Resistance Memory
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Solution Overview
Problem
Current semiconductor memory devices face challenges in miniaturization, power consumption, and data storage accuracy due to the need for separate reference columns and voltage generation units, which occupy significant area and complicate data determination in variable resistance elements.
Innovation Solution
The implementation of an electronic device with two cell arrays sharing a reference cell and a reference voltage generation unit placed between the word line driving unit, allowing for reduced area usage and improved data reading accuracy through bias voltage generation based on currents flowing through reference resistance elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate reference columns are provided for each cell array, then data reading accuracy is improved, but circuit area increases
Solution Approach 1:
The patent merges the reference columns of the first and second cell arrays into a single shared reference column. The read control unit selectively connects this shared reference column to either the first bit line or the second bit line based on which cell array requires reading, thereby reducing the number of reference columns from two to one while maintaining data reading accuracy for both arrays.
Solution Approach 2:
The shared reference column serves multiple functions by being selectively connected to different bit lines. It acts as the reference for reading data from the first cell array during first read operations and as the reference for reading data from the second cell array during second read operations, making a single reference column universal for both arrays.
2Measurement precision
If separate voltage generation units are provided for each cell array, then voltage control precision is improved, but device complexity increases
Solution Approach 1:
The patent combines two separate voltage generation units into a single voltage generation unit that serves both cell arrays. The read control unit selectively connects the voltage generation unit to either the first bit line or the second bit line, allowing one voltage generation unit to provide precise voltage control for reading operations in both the first and second cell arrays.
Solution Approach 2:
The voltage generation unit dynamically changes its connection target based on operational requirements. The read control unit switches the connection of the voltage generation unit between the first bit line and the second bit line, enabling a single static voltage generation unit to fulfill dynamic voltage control needs for different cell arrays.
3Reliability
If reference cells are not shared, then data reading reliability is improved, but area consumption increases
Solution Approach 1:
The patent merges the reference cells of both cell arrays into a single shared reference cell located in the shared reference column. This reference cell provides reliable reference current for reading operations in both the first and second cell arrays, maintaining data reading reliability while reducing the area consumed by reference cells from two separate cells to one shared cell.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the overall circuit area and enhances data storage accuracy by utilizing shared reference cells and integrated voltage generation, improving the efficiency and portability of semiconductor memory devices.
Implementation Method 1
a bias voltage generation unit arranged between the first cell array and the second cell array and suitable for generating a bias voltage based on currents flowing through the first reference resistance element and the second reference resistance element
Data Source
AI summary
An electronic device includes a semiconductor memory device. The semiconductor memory device includes: a word line driving unit for driving a plurality of word lines; a first circuit area including a first cell array arranged at one side of the word line driving unit; a second circuit area including a second cell array arranged at the other side of the word line driving unit; a bias voltage generation unit arranged between the first cell array and the second cell array; a first read control unit; and a second read control unit. The first and second cell arrays include storage cells having variable resistance elements, and the bias voltage generation unit generates a bias voltage based on currents flowing through a first reference resistance element included in the first cell array and a second reference resistance element included in the second cell array.