Shared Register Test Circuit for SRAM and Logic Modes
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Solution Overview
Problem
Conventional testing systems for SRAM and logic circuits require additional registers and passby circuits to isolate and test these components, leading to increased circuit area, which worsens the issue of large circuit size.
Innovation Solution
A testing system that shares a register across two test modes, utilizing a BIST circuit, storage apparatus, logic circuits, and a passby circuit to reduce circuit area by using multiplexers and a switch circuit to switch between test modes, allowing the same register to be used for both SRAM and logic circuit testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate registers are provided for SRAM testing and logic circuit testing, then test coverage is improved, but circuit area increases
Solution Approach 1:
The patent applies universality by designing a single register that serves multiple functions: it acts as a pipeline register for SRAM testing during BIST mode, and as a passby circuit register for logic circuit testing during scan mode. This multi-functional register eliminates the need for separate registers, thereby reducing circuit area while maintaining comprehensive test coverage for both SRAM and logic circuits
Solution Approach 2:
The patent implements dynamics by making the register's function changeable based on test mode. Through mode control signals, the same register dynamically switches between being a pipeline register (with enable signal connected to BIST circuit) and a passby circuit register (with enable signal connected to passby circuit), allowing flexible adaptation to different testing requirements without increasing hardware area
2Reliability
If passby circuit is activated to isolate SRAM and logic circuit, then test coverage of logic circuit is improved, but circuit area increases
Solution Approach 1:
The patent applies universality by integrating the passby circuit functionality into the existing register structure. The register serves dual purposes: as a pipeline register during SRAM testing and as a passby circuit register during logic circuit testing. This eliminates the need for additional dedicated passby circuit components, reducing overall circuit area while maintaining isolation capability between SRAM and logic circuit during testing
Data Source
AI summary
A test system, comprising: a BIST circuit for generating a first signal; a storage apparatus, for storing the first signal to generate a second signal; a first logic circuit, for generating a third signal; a second logic circuit; a register; and a passby circuit. In a first mode, the BIST circuit transmits the first signal to the storage device, the storage device outputs the second signal to the register for registering, and then the register outputs the registered second signal to the BIST circuit to test the storage apparatus. In a second mode, the first logic circuit transmits a third signal to the register for registering, and then the register outputs the registered third signal to the second logic circuit.