Shared Scribe Line Testing Pads for IC Characterization
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Solution Overview
Problem
In semiconductor fabrication, existing testing methods often interfere with the characteristics of semiconductor components due to the placement of testing pads, which can affect the normal operation of integrated circuits during wafer acceptance testing.
Innovation Solution
The testing circuit design places all required pads on the scribe line, allowing integrated circuits to share command, power, and data pads, with latches enabling operation commands to be transmitted efficiently, reducing the number of pads needed and minimizing interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If testing pads are placed within the integrated circuit area, then testing can be performed, but the testing pads interfere with the normal operation and characteristics of the integrated circuits
Solution Approach 1:
The testing pads are extracted from the integrated circuit area and relocated to the scribe line area. This separation removes the harmful interference of testing pads from the normal IC operation while preserving the ability to perform wafer acceptance testing. The scribe line serves as a dedicated testing zone that does not overlap with functional circuit areas.
Solution Approach 2:
The scribe line acts as an intermediary zone between the functional IC areas and the testing equipment. By placing testing pads in this intermediate region, the patent enables testing functionality while isolating it from the sensitive IC operational areas, thus resolving the conflict between testing access and operational integrity.
2Ease of operation
If separate testing pads are provided for each integrated circuit, then each circuit can be tested independently, but the number of pads increases and space is wasted
Solution Approach 1:
The testing pads in the scribe line area are designed to serve multiple integrated circuits simultaneously. A single set of testing pads can access and test multiple ICs through the shared scribe line region, eliminating the need for separate dedicated pads for each IC while maintaining independent testing capability through selective addressing.
Solution Approach 2:
The patent merges the testing functionality for multiple integrated circuits into a single shared testing pad structure located in the scribe line. This consolidation reduces the total number of pads required while preserving the ability to test each IC independently through signal routing and selection mechanisms.
3Ease of manufacture
If multiple integrated circuits each have dedicated testing pads, then testing is straightforward, but the scribe line space is excessively consumed
Solution Approach 1:
The testing pads are designed with multi-functional capability to serve multiple ICs located in the scribe line area. This universal design allows a compact pad structure to access multiple circuits, thereby reducing the total scribe line area required for testing while maintaining ease of manufacturing through standardized testing procedures.
Data Source
AI summary
A testing circuit includes a command pad, a first circuit, a second circuit, a first latch, and a second latch. The command pad receives an operation command. The first integrated circuit performs a corresponding test operation according to the operation command and an internal selection signal. The second integrated circuit performs the corresponding test operation according to the operation command and an internal selection signal. The first latch provides the operation command to the first integrated circuit according to the internal selection signal. The second latch provides the operation command to the second integrated circuit according to the internal selection signal.