Shared Source/Drain Contact for Stacked Transistor Etch Access
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Solution Overview
Problem
The challenge in semiconductor manufacturing lies in forming high-aspect ratio openings to contact source/drain regions of stacked transistors, which can lead to process complexity and incomplete etch-out issues.
Innovation Solution
A semiconductor structure is developed with a shared S/D contact that includes a first portion in direct contact with the bottom surface of a second transistor and a second portion wrapped around by the first transistor, along with a backside S/D contact, allowing for efficient connection to both transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If high-aspect ratio openings are formed to contact source/drain regions of stacked transistors, then contact to both top and bottom transistors is achieved, but process complexity increases and complete etch-out becomes difficult to manage
Solution Approach 1:
The contact structure is segmented into multiple portions: a first portion contacting the bottom surface of the second S/D region, and a second portion wrapped around by the first S/D region. This segmentation allows each portion to be formed through separate, more manageable etching processes rather than requiring a single complex high-aspect ratio opening
Solution Approach 2:
The contact structure transitions from a simple vertical via to a multi-dimensional structure where the second portion wraps around the first S/D region. This dimensional change enables contact to both stacked transistors through a more complex but controllable formation process
2Reliability
If high-aspect ratio openings are formed to reach source/drain regions of stacked transistors, then contact connectivity is achieved, but etch-out control becomes problematic
Solution Approach 1:
The etching process is segmented into multiple steps corresponding to the different contact portions. The first opening is etched to expose the first S/D region, then the second opening is etched to expose the second S/D region. This segmentation ensures complete etch-out at each stage while maintaining overall contact connectivity
Solution Approach 2:
The first S/D region is formed and positioned before forming the second contact portion. This preliminary action provides a structural guide that ensures complete etch-out of the first opening before proceeding to the second opening, preventing etch-resist issues
Data Source
AI summary
Embodiments of present invention provide a semiconductor structure. The semiconductor structure includes a first transistor having a first source/drain (S/D) region; a second transistor having a second S/D region, the second S/D region being on top of the first S/D region; and a shared S/D contact, the shared S/D contact having a first portion being in direct contact with a bottom surface of the second S/D region of the second transistor and a second portion being wrapped around by the first S/D region of the first transistor. A method of forming the same is also provided.