Shared Sequence Number Counters for Reliable Messaging

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Solution Overview

Problem

In parallel processing systems, the existing mechanisms require a large number of counters to track sequence numbers for network packets, leading to significant memory usage, especially in systems with a large number of nodes and endpoints, which increases space consumption and inefficiency.

Innovation Solution

The proposed method involves maintaining shared sequence number counters in shared memory across multiple destination processes, allowing sender processes to increment and share these counters for message sequencing, while receiver processes maintain local memory counters for each sending node to ensure ordered delivery of packets, thereby reducing the total number of counters needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If each endpoint maintains one sequence number for every P*N endpoints to track completion and order of processes, then reliable message passing is achieved, but memory space usage increases significantly to P*P*N sequence numbers per node

Engineering Contradiction:
Improvemessage passing reliabilityVSAvoidmemory space usage
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges the sequence number counters by having all sender processes on a node share a single counter per destination process rather than each sender maintaining separate counters. This consolidation reduces the total number of counters from P*P*N to P*N while maintaining the ability to track message sequence numbers for reliable delivery.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared counter mechanism serves multiple sender processes simultaneously, making the counter universal for all senders on a node. Each sender process can increment and read the same counter for a given destination, eliminating the need for separate counters per sender while preserving sequence tracking functionality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If multiple identical processors are connected to a single shared main memory in symmetric multiprocessing, then processing parallelism is improved, but the number of sequence numbers needed increases to P*P*N which increases space usage

Engineering Contradiction:
Improveprocessing parallelismVSAvoidspace usage
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent merges the counter storage across all P sender processes by implementing a shared counter in memory that all senders can access and increment. This single shared counter per destination replaces what would otherwise be P separate counters per destination, reducing total counter storage from P*P*N to P*N.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Instead of each sender process maintaining its own copy of counters for all destinations, the patent uses a single shared copy of counters that is accessed by all senders. This eliminates redundant copies of the same counter data across multiple processes while maintaining the necessary sequence tracking capability.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10812416B2Reduced number of counters for reliable messaging
Publication Date: 2020.10.20 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10812416B2 patent drawing
  • US10812416B2 patent drawing
  • US10812416B2 patent drawing

AI summary

A shared memory maintained by sender processes stores a sequence number counter per destination process. A sender process increments the sequence number counter in the shared memory in sending a message to a destination process. The sender process sends a data packet comprising the message and at least a sequence number specified by the sequence number counter. All of the sender processes share a sequence number counter per destination process, each of the sender processes incrementing the sequence number counter in sending a respective message. Receiver processes run on the hardware processor, each of the receiver processes maintaining a local memory counter on the memory, the local memory counter associated with a sending node. The local memory counter stores a sequence number of a message received from the sending node. The receiver process delivers incoming data packets ordered by sequence numbers of the data packets.