Shared SERDES Lanes for Multi-Protocol Communication

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Solution Overview

Problem

Multi-core systems require extensive high-speed serial interconnection lines for various communication protocols, leading to significant chip area and power consumption due to the need for dedicated SERDES lanes for each protocol, limiting flexibility and efficiency.

Innovation Solution

A multi-core die architecture that shares SERDES lanes between different communication protocols using a data router and protocol coding sublayers, allowing configuration based on coded inputs to allocate lanes for selected protocols, reducing the number of required SERDES lanes and optimizing power and area usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If dedicated SERDES lanes are provided for each communication protocol to ensure protocol flexibility and performance, then communication capability and adaptability are improved, but chip area and power consumption increase significantly

Engineering Contradiction:
Improveprotocol flexibilityVSAvoidchip area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent implements a universal SERDES lane structure that can be dynamically allocated to different communication protocols (PCIe, Ethernet, Interlaken, etc.) through a protocol encoder and multiplexer system. A single set of physical SERDES lanes serves multiple protocol functions by receiving protocol-specific encoded data from different protocol encoders, eliminating the need for dedicated physical lanes for each protocol while maintaining full protocol support capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges multiple protocol-specific data paths into a shared physical SERDES infrastructure. Different protocol encoders (PCIe encoder, Ethernet encoder, Interlaken encoder) are combined and their outputs are multiplexed onto common SERDES lanes, consolidating what would traditionally require separate physical connections into a unified shared resource that reduces overall chip area.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If multiple dedicated SERDES lanes are allocated for different protocols, then communication bandwidth and performance are improved, but power consumption increases

Engineering Contradiction:
Improvecommunication bandwidthVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The patent employs dynamic resource allocation where SERDES lanes are not permanently dedicated to specific protocols but are dynamically assigned based on which protocol is currently active. A protocol selection signal dynamically controls the multiplexer to route data from the appropriate protocol encoder to the active SERDES lanes, enabling the same physical lanes to serve different protocols at different times and reducing power consumption by keeping lanes idle when not in use.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system implements periodic protocol encoding and multiplexing where different protocol data streams are periodically multiplexed onto the shared SERDES lanes based on protocol activity. When a specific protocol is active, its encoded data is periodically transmitted through the shared lanes, allowing bandwidth to be allocated on-demand rather than continuously, thereby reducing power consumption during periods when certain protocols are inactive.

Inventive Principle:
Principle #19Periodic action

3Reliability

If protocol-specific controllers and dedicated interconnections are implemented for each protocol, then communication reliability and protocol performance are improved, but device complexity increases

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a protocol encoder as an intermediary component between the protocol-specific logic and the shared SERDES lanes. Each protocol has its own encoder that performs protocol-specific encoding and formatting, and the encoder outputs are fed to a multiplexer that acts as a mediator to route the encoded data to the appropriate shared SERDES lanes. This intermediary structure maintains protocol-specific reliability requirements while managing the complexity through a standardized interface to the shared infrastructure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240354276A1Sharing high speed serial interconnects for different protocols
Publication Date: 2024.10.24 CORNAMI INC
  • US20240354276A1 patent drawing
  • US20240354276A1 patent drawing
  • US20240354276A1 patent drawing

AI summary

A system and method to allocate serial interconnection lanes on a die to multiple communication protocols is disclosed. The die has at least one processing core. The die incudes a first communication subsystem including a controller, a protocol coding sublayer (PCS) for interchanging data, and a data interface coupled to the core. The die includes a second communication subsystem including a controller, a PCS for interchanging data, and a data interface coupled to the core. A mode input selects at least one of the first or second communication protocol. A data router has an input coupled to the PCS of the first communication subsystem and an input coupled to the PCS of the second communication subsystem. The data router has an output coupled to the set of serial interconnection lanes, and a selection input coupled to the mode input to allocate some of the lanes for the selected protocol.