Shared Signal Input Circuit for IC Pin-Limited Mode Switching
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Solution Overview
Problem
Conventional integrated circuit (IC) chips require multiple pins for each work mode signal, leading to inefficient pin usage, especially when the chip operates in a single work mode and needs to change modes unexpectedly, and they do not effectively utilize pins when the number of pins is limited.
Innovation Solution
A signal input circuit with a control signal input terminal and common signal input terminals, where first and second signal units receive and output signals under control of the control signal, allowing sharing of signal input terminals to reduce the number of pins required, using latch units and flip-flops to manage signal transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If each work mode signal is input through a separate work mode pin, then the chip can receive multiple work mode signals, but the number of pins increases, leading to inefficient pin usage
Solution Approach 1:
The patent makes a single pin serve multiple functions by enabling it to input different work mode signals at different times through latch units. The same pin can be configured to receive different work mode signals (e.g., WORKMODE0, WORKMODE1, WORKMODE2) sequentially, allowing one pin to replace multiple dedicated pins and thereby reducing the total pin count while maintaining full work mode signal reception capability
Solution Approach 2:
The patent introduces dynamic configuration of pin functions through control signals and latch units. The function of each pin is not fixed but can be dynamically changed during chip operation or initialization, allowing the system to adaptively assign different work mode signal inputs to the same physical pin at different times, thus optimizing pin utilization
2Adaptability or versatility
If work mode signals are changed during chip operation, then the chip can adapt to different work modes, but the work mode may change unexpectedly, causing instability
Solution Approach 1:
The patent uses latch units to capture and hold work mode signals at specific moments (such as during initialization or when a valid transition occurs). By preliminarily capturing the signal state before processing, the system ensures that only properly timed and validated work mode changes are registered, preventing unexpected or premature mode transitions that could compromise system stability
Solution Approach 2:
The patent implements feedback mechanisms where the current work mode state is monitored and compared before allowing transitions. The latch units and control logic provide feedback to verify that work mode signal changes are intentional and valid, ensuring that mode switching occurs only under controlled conditions and maintaining system reliability during adaptability operations
3Productivity
If multiple pins are used for work mode signals, then all signals can be received simultaneously, but power consumption increases due to more active circuit elements
Solution Approach 1:
The patent merges the functionality of multiple dedicated work mode signal pins into a single shared pin. By combining the signal reception function of multiple pins into one pin that operates sequentially with latch units, the total number of active input circuits is reduced, thereby lowering power consumption while maintaining the capability to receive all necessary work mode signals
Data Source
AI summary
A signal input circuit and method and chip are disclosed. The signal input circuit includes a control signal input terminal configured for receiving a control signal; at least one common signal input terminal each configured for receiving a corresponding common signal; at least one first signal output terminal each configured for outputting a corresponding first signal; at least one first signal unit each configured for receiving said corresponding common signal and outputting said corresponding common signal as said corresponding first signal under control of said control signal; at least one second signal output terminal each configured for outputting a corresponding second signal; and at least one second signal unit each configured for receiving said corresponding common signal and outputting said corresponding common signal as said corresponding second signal under control of said control signal.