Shared SPI Flash Firmware Initialization for CPU and GPU

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Solution Overview

Problem

Current computing devices with multiple processing units, such as CPUs and discrete GPUs, require separate memory devices for firmware, leading to inefficiencies and increased Bill of Materials (BOM) costs, as well as security challenges due to redundant firmware and hardware components.

Innovation Solution

The proposed solution involves sharing memory devices and firmware between processing units, using a master-attached flash sharing scheme where the CPU accesses a shared SPI flash, and the GPU accesses it via the CPU, reducing redundant hardware and firmware, and enhancing security through region access control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate memory devices are used for each processing unit, then each processing unit can independently access its firmware, but hardware redundancy increases and BOM costs rise

Engineering Contradiction:
Improveindependent firmware accessVSAvoidhardware redundancy
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent consolidates firmware storage for multiple processing units (CPU, GPU, NPU) into a single shared memory device, eliminating redundant hardware components. The shared memory device contains multiple firmware images that can be selectively loaded by different processing units, reducing BOM costs while maintaining functional independence.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared memory device serves multiple functions by storing firmware for different processing units and enabling any processing unit to access any firmware image. The system provides universal access capabilities where the CPU can load GPU firmware, the GPU can load CPU firmware, and NPU firmware can be loaded by any processor, creating a multi-functional storage solution.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If separate memory devices are used for each processing unit, then firmware security is maintained through isolation, but device complexity and BOM costs increase

Engineering Contradiction:
Improvefirmware securityVSAvoidhardware components
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple firmware storage locations into a single shared memory device, reducing hardware complexity. The memory device contains multiple firmware images with different security attributes, and the system uses controlled access mechanisms to maintain security while simplifying the hardware architecture.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent applies local quality by assigning different security attributes to different firmware images within the shared memory device. Each firmware image has specific access control rules that determine which processing units can load and execute it, maintaining security isolation at the firmware level while using shared hardware.

Inventive Principle:
Principle #3Local quality

3Reliability

If redundant firmware is stored for each processing unit, then initialization reliability is improved, but manufacturing costs and bill of materials increase

Engineering Contradiction:
Improveinitialization reliabilityVSAvoidmanufacturing costs
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines multiple firmware images into a single memory device, reducing manufacturing complexity and costs. Instead of procuring and installing separate memory devices for each processing unit, the system uses one shared memory device that contains all necessary firmware images, simplifying the manufacturing process and reducing BOM costs.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent uses firmware image copying where the same or different firmware images are stored in the shared memory device and selectively loaded by different processing units. This allows the system to maintain initialization reliability through redundant firmware copies without requiring separate physical memory devices for each processor.

Inventive Principle:
Principle #26Copying

4Speed

If each processing unit has dedicated firmware storage, then access speed is optimized, but hardware redundancy and cost increase

Engineering Contradiction:
Improvefirmware access speedVSAvoidmemory devices
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent merges multiple firmware storage locations into a single shared memory device that can be accessed by any processing unit. The memory device is designed to provide fast access capabilities, and the system can load firmware images into volatile memory for rapid execution, maintaining access speed while reducing hardware redundancy.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces an intermediary mechanism (firmware loader and memory management system) that mediates access between processing units and the shared firmware images. This intermediary can pre-load firmware into volatile memory buffers, managing access to the shared non-volatile memory device and maintaining fast access performance despite the shared architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240176624A1Computing devices and method and computing device for initializing a computing device
Publication Date: 2024.05.30 INTEL CORP
  • US20240176624A1 patent drawing
  • US20240176624A1 patent drawing
  • US20240176624A1 patent drawing

AI summary

Various examples of the present disclosure relate to a computing device, and to a method and computer program for initializing a computing device. The computing device comprises a memory device, configured to store firmware for at least a first processing unit and a second processing unit. The computing device comprises a first processing unit, configured to obtain the firmware for the first processing unit from the memory device, and to initialize itself using the firmware obtained from the memory device. The computing device comprises a second processing unit, configured to obtain the firmware for the second processing unit from the memory device, and to initialize itself using the firmware obtained from the memory device.