Shared SRAM Contact Structure for Alignment-Tolerant Memory Cells
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Solution Overview
Problem
There is an increasing demand for semiconductor memory devices with improved characteristics such as high reliability, high performance, and increased integration density, which existing technologies have not adequately addressed.
Innovation Solution
The semiconductor memory devices incorporate an active pattern with a gate electrode and source/drain patterns, connected by a shared contact that includes a body portion and a protruding portion, and an SRAM cell design with specific transistor configurations to enhance electrical connectivity and integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If complexity and integration density of semiconductor devices are increased to meet demand for high performance and reliability, then device functionality and performance are improved, but manufacturing precision and alignment requirements become more stringent
Solution Approach 1:
The gate contact is formed with a protruding portion that extends into the active contact region in advance, before final alignment is achieved. This preliminary positioning ensures that even with alignment variations, the gate contact will overlap with the active contact, establishing electrical connection without requiring ultra-precise alignment.
Solution Approach 2:
The gate contact structure transitions from a planar two-dimensional contact to a three-dimensional structure with a protruding portion that vertically overlaps the active contact. This dimensional change allows electrical connection to be achieved through vertical overlap rather than requiring precise horizontal alignment, thereby reducing alignment precision requirements.
2Device complexity
If shared contact structure is used to connect source/drain pattern and gate electrode, then device complexity is reduced, but contact resistance may increase
Solution Approach 1:
The gate contact structure is nested within the active contact structure, with the gate contact's protruding portion embedded in the active contact material. This nested configuration allows both contacts to share the same vertical pathway, reducing the number of separate contact structures needed while ensuring low resistance through overlapping conductive regions.
Solution Approach 2:
The gate contact and active contact are merged into a single shared contact structure that provides electrical connection to both the gate electrode and the source/drain pattern. This merging reduces device complexity by eliminating separate contact structures while maintaining reliable electrical connection through the combined conductive pathway.
Data Source
AI summary
A semiconductor memory device includes an active pattern on a substrate, the active pattern including a source/drain pattern in an upper portion thereof, a gate electrode on the active pattern and extended in a first direction, the gate electrode and the source/drain pattern adjacent to each other in a second direction that crosses the first direction, and a shared contact coupled to the source/drain pattern and the gate electrode to electrically connect the source/drain pattern and the gate electrode. The shared contact includes active and gate contacts, which are electrically connected to the source/drain pattern and the gate electrode, respectively. The gate contact includes a body portion coupled to the gate electrode and a protruding portion, which protrudes from the body portion in the second direction and extends into and buried in the active contact.