Shared Storage Circuit Managing Mixed Latency Data Access
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Solution Overview
Problem
In data storage systems, the increasing latency and unpredictability of access times across different levels of the memory hierarchy pose challenges for real-time applications that require immediate data retrieval.
Innovation Solution
An apparatus and method that utilize a shared storage circuit to manage data from both high and low latency storage circuits, forwarding access requests accordingly and employing writethrough and eviction strategies to ensure timely data retrieval without unnecessary delays, particularly for real-time applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is stored in high capacity storage circuits, then storage capacity increases, but access latency increases and becomes unpredictable
Solution Approach 1:
The storage system is segmented into multiple storage circuits with different latency characteristics. The apparatus divides the storage space into first storage space (lower latency) and second storage space (higher latency), allowing data to be stored in appropriate segments based on access requirements.
Solution Approach 2:
Different regions of the storage system are assigned different quality characteristics. The first storage circuit provides low-latency access for time-critical data, while the second storage circuit provides high-capacity storage for less time-sensitive data, optimizing both speed and capacity locally.
2Loss of time
If data is stored in low latency storage circuits, then access time decreases, but storage capacity is limited
Solution Approach 1:
The apparatus merges multiple storage circuits with different characteristics into a unified storage system. By combining low-latency storage circuits and high-capacity storage circuits, the system achieves both fast access and large capacity through the shared storage circuit interface.
Solution Approach 2:
The shared storage circuit serves multiple functions by interfacing with both low-latency and high-capacity storage circuits. It can store and retrieve data from either type of storage circuit, providing universal access to diverse storage resources.
3Productivity
If separate storage circuits are used for different data types, then data access efficiency improves, but device complexity increases
Solution Approach 1:
The shared storage circuit acts as an intermediary between the processing circuit and multiple storage circuits with different latency characteristics. It manages data storage and retrieval operations, forwarding requests to appropriate storage circuits while presenting a unified interface to the processing circuit, thereby reducing the complexity burden on the overall system.
Data Source
AI summary
There is provided an apparatus that includes a first port that receives first data of a first type from a first storage circuit. A second port receives second data of a second type from a second storage circuit having a lower worst case latency in hardware than the first storage circuit. A third port receives access requests for the first data and the second data from a processing circuit. When one of the access requests is received for the first data, it is forwarded to the first storage circuit and when the one of the access requests is received for the second data, it is forwarded to the second storage circuit. A shared storage circuit stores the first data and the second data and has a storage capacity.