Shared Storage Device for Multi-Standard Video Decoding
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Solution Overview
Problem
Conventional video encoder/decoder designs require multiple memory devices to support different video coding standards, leading to inefficiencies in cost, power consumption, and hardware complexity due to the need for separate memory access patterns for scan/inverse scan and quantization/inverse quantization operations.
Innovation Solution
A shared storage device is used, accessible by multiple processing circuits, allowing the same memory to be accessed differently for various video coding standards, such as AVS and HEVC, through a control circuit that configures storage addresses and modes for efficient data access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple memory devices are implemented to support different video coding standards, then compatibility with multiple standards is improved, but hardware cost and device complexity increase
Solution Approach 1:
The patent implements a universal memory device that serves multiple video coding standards (AVS, HEVC, etc.) through a single hardware resource. The memory device is designed with configurable address mapping capabilities that allow it to adapt to different standards' requirements, eliminating the need for separate memory devices for each standard while maintaining full compatibility.
Solution Approach 2:
The patent changes the address mapping parameters dynamically based on the active video coding standard. By configuring different address mapping modes (one-to-one mapping, one-to-many mapping, many-to-one mapping) according to the required standard, the same memory device can satisfy the diverse access patterns of different standards without hardware modification.
2Adaptability or versatility
If multiple memory devices are implemented for scan/inverse scan operations of different standards, then standard compatibility is improved, but power consumption increases
Solution Approach 1:
The patent creates a universal scan buffer that handles scan and inverse scan operations for multiple video coding standards through a single memory device. This unified approach eliminates the power consumption of multiple separate memory devices while maintaining support for diverse scan patterns required by different standards.
3Adaptability or versatility
If multiple memory devices are implemented for quantization/inverse quantization operations, then compatibility with different standards is improved, but hardware cost increases
Solution Approach 1:
The patent implements a universal quantization buffer that serves multiple video coding standards through a single memory device. This approach significantly reduces hardware cost by eliminating redundant memory devices while maintaining full compatibility with different quantization standards through configurable address mapping.
4Speed
If separate memory devices are used for different video coding standards, then data access efficiency for each standard is maintained, but device complexity and cost increase
Solution Approach 1:
The patent maintains data access efficiency by dynamically changing address mapping parameters based on the active video coding standard. The configurable address mapping modes allow the single memory device to optimize data access patterns for each standard, achieving the same speed performance as separate memory devices would provide.
Data Source
AI summary
A video decoder has a first processing circuit and a second processing circuit. A shared storage device is accessible to the first processing circuit and the second processing circuit. The first processing circuit performs a first decoding operation according to data access of the shared storage device. The second processing circuit performs a second decoding operation according to data access of the shared storage device. The first decoding operation is at least a portion of a first decoding function complying with a first video coding standard, and the second decoding operation is at least a portion of a second decoding function complying with a second video coding standard different from the first video coding standard.


