Shared Sub-Libraries for Fixed-Point and Floating-Point Operations

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Solution Overview

Problem

Integrated circuits, such as FPGAs, face challenges in optimizing fixed-point and floating-point operations due to the high resource consumption, which limits the functionality and replication of kernels, thereby affecting throughput.

Innovation Solution

The implementation of enhanced fixed-point and floating-point operations that share sub-functions and utilize shared sub-libraries, reducing the logical elements needed for these operations, and employing polynomial approximation circuits to support a set of functions, thereby optimizing resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If fixed-point and floating-point operations are implemented on ICs, then computational functionality is improved, but logical element consumption increases significantly

Engineering Contradiction:

Improvecomputational functionalityVSAvoidlogical element consumption

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple fixed-point and floating-point operations into shared sub-libraries, merging common computational sub-functions (such as absolute value, square root, trigonometric functions) into reusable blocks that serve multiple kernels, thereby reducing redundant logical element consumption

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent creates universal sub-libraries that can be used across different kernels and computational tasks. These sub-libraries provide multi-functional support for various mathematical operations, allowing a single implementation to serve multiple purposes and reduce overall logical element requirements

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Productivity

If more kernels are replicated on the IC, then throughput is improved, but available logical elements are depleted

Engineering Contradiction:

ImprovethroughputVSAvoidavailable logical elements

Core Design Contradiction:

ProductivityVSArea of stationary object

Solution Approach 1:

By merging common sub-functions into shared sub-libraries, the patent enables multiple kernels to share the same logical elements, effectively allowing more kernels to be replicated on the IC without proportionally increasing logical element consumption, thus improving throughput

Inventive Principle:

Principle #5Merging (Combining)

3Ease of manufacture

If standard fixed-point and floating-point libraries are used, then ease of implementation is improved, but resource efficiency deteriorates

Engineering Contradiction:

Improveease of implementationVSAvoidresource efficiency

Core Design Contradiction:

Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent merges standard library functions into optimized sub-libraries that combine multiple operations into shared implementations, maintaining ease of use while significantly improving resource efficiency by eliminating redundancies

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent transforms standard library implementations into optimized versions with modified parameters and structures that reduce logical element consumption while maintaining the same functional interface and ease of implementation

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS9696991B1Fixed-point and floating-point optimization

Publication Date: 2017.07.04 ALTERA CORP

AI summary

Systems and methods for enhancing fixed-point operations, floating-point operations, or a combination thereof for programs implemented on an integrated circuit (IC) are provided. Portions of these operations may be shared among the operations. Accordingly, the embodiments described herein enhance these fixed-point operations, floating-point operations, or a combination thereof based upon these portions of the operations that may be shared.