Shared Switch Transistor Circuit for Display Uniformity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current display technologies face challenges in achieving improved display resolution and manufacturing yield while enabling normal sequential scan programming, and they struggle with the limitations of single-type thin-film transistors (TFTs), which affect the integration of circuitry on the display substrate and result in issues with current source stability and spatial/temporal uniformity.
Innovation Solution
A circuit design that shares a switch transistor between multiple pixel circuits, using a reference voltage transistor and a shared switch transistor, along with a display driver circuit to control voltage programming and bias current application, allowing for efficient programming and driving of light-emitting devices with improved transistor utilization and uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a switch transistor is shared between multiple pixel circuits, then the number of transistors per pixel is reduced and manufacturing yield is enhanced, but the complexity of circuit design and control increases
Solution Approach 1:
The patent merges the switch transistor function across multiple pixel circuits by connecting the drain of a single switch transistor to multiple storage capacitors (CST1, CST2) representing different sub-pixels. This sharing approach reduces the total transistor count per pixel while maintaining proper signal routing through the shared line, thereby improving manufacturing yield without sacrificing functionality
Solution Approach 2:
The shared switch transistor serves multiple functions by controlling the programming of multiple sub-pixels through the shared line. The single transistor acts as a universal switch that can route programming signals to different storage capacitors based on the activation state of different sub-pixels, reducing device count while maintaining multi-functionality
2Ease of manufacture
If p-type TFT is used for current source, then the source terminal can be fixed to VDD, but the output resistance becomes high and current stability deteriorates
Solution Approach 1:
The patent introduces an n-type TFT as an intermediary element between the p-type current source transistor and the output line. The n-type TFT acts as a buffer that isolates the p-type transistor's source terminal from output voltage variations, preventing direct coupling that would cause current instability. This intermediary structure maintains the ease of p-type transistor integration while improving current source reliability
Solution Approach 2:
The current source circuit uses a composite structure combining both p-type and n-type TFTs. The p-type transistor provides the current source function with fixed VDD connection, while the n-type transistor compensates for the high output resistance issue. This composite approach leverages the advantages of both transistor types to achieve both ease of manufacture and current stability
3Ease of operation
If p-type TFT is used for current sink, then the source connects to output line, but source voltage variability directly affects gate-source voltage and current constancy is lost
Solution Approach 1:
The patent introduces an n-type TFT as an intermediary between the p-type current sink transistor and the output line. This intermediary buffer prevents direct coupling between output voltage variations and the p-type transistor's gate-source voltage, eliminating the harmful effect of source voltage variability on current constancy while maintaining ease of output line connection
4Productivity
If display resolution is improved by reducing transistors per pixel, then manufacturing yield increases, but the ability to maintain spatial and temporal uniformity becomes more challenging
Solution Approach 1:
The patent implements a feedback mechanism where the shared line connects back to the gate of the shared switch transistor through a reference voltage transistor. This feedback loop allows the circuit to monitor and adjust the programming signal based on the actual state of multiple sub-pixels, ensuring uniformity across different pixels even with reduced transistor count. The feedback compensates for variations and maintains spatial and temporal uniformity
Data Source
AI summary
A technique for improving the spatial and/or temporal uniformity of a light-emitting display by providing a faster calibration of reference current sources and reducing the noise effect by improving the dynamic range, despite instability and non-uniformity of the transistor devices. A calibration circuit for a display panel having an active area having a plurality of light emitting devices arranged on a substrate, and a peripheral area of the display panel separate from the active area is provided. The calibration circuit includes a first row of calibration current source or sink circuits and a second row of calibration current source or sink circuits. A first calibration control line is configured to cause the first row of calibration current source or sink circuits to calibrate the display panel with a bias current while the second row of calibration current source or sink circuits is being calibrated by a reference current. A second calibration control line is configured to cause the second row of calibration current source or sink circuits to calibrate the display panel with the bias current while the first row of calibration current source or sink circuits is being calibrated by the reference current.