Shared Testkey Detection Circuit for Semiconductor Wafer Testing
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Solution Overview
Problem
The high hardware and time costs associated with configuring and operating testkey detection circuits in semiconductor manufacturing, particularly due to the need for multiple detection circuits for each testkey across numerous wafers and integrated circuit units, necessitate a more efficient solution to reduce costs and streamline the detection process.
Innovation Solution
A testkey detection circuit design that utilizes a shared multiplexer, divider, and buffer circuit to process frequency signals from multiple oscillators, allowing simultaneous detection of multiple testkeys and reducing the number of required detection circuits and mechanical operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate detection circuits are configured for each testkey to ensure accurate detection, then detection reliability is improved, but hardware cost and circuit complexity increase significantly
Solution Approach 1:
The patent implements a shared detection circuit that can detect multiple testkeys through sequential selection. The detection circuit is configured to be shared by a plurality of testkeys, with the ability to select and detect different testkeys in different time slots, thereby reducing hardware complexity while maintaining detection reliability across all testkeys
Solution Approach 2:
The patent introduces a dynamic selection mechanism that allows the detection circuit to switch between different testkeys based on selection signals. This dynamic configuration enables a single circuit to serve multiple testkeys sequentially, resolving the contradiction between having dedicated circuits for reliability and sharing circuits for reduced complexity
2Reliability
If separate detection circuits are configured for each testkey to ensure accurate detection, then detection reliability is improved, but time cost increases due to sequential processing requirements
Solution Approach 1:
The patent employs periodic action by implementing sequential detection of multiple testkeys through a shared circuit. The detection process cycles through different testkeys in a systematic manner, with each testkey being detected in its designated time slot, ensuring reliable detection while optimizing the overall detection time through structured periodic operation
3Measurement precision
If more testkeys are configured to detect properties at different positions and conditions, then measurement precision and coverage are improved, but hardware cost increases proportionally
Solution Approach 1:
The patent makes the detection circuit universal by enabling it to detect multiple testkeys that monitor different properties at various positions and conditions. The shared circuit can be selectively configured to detect any of the plurality of testkeys, providing comprehensive measurement coverage without requiring proportional increases in hardware complexity
Solution Approach 2:
The patent introduces dynamic selection capability that allows the detection circuit to adaptively switch between different testkeys based on detection needs. This dynamic configuration enables comprehensive monitoring of multiple properties and positions using a single flexible circuit, resolving the contradiction between extensive measurement coverage and hardware cost
Data Source
AI summary
The invention provides a testkey detection circuit, including a plurality of oscillators and a driving circuit. Each of the oscillators has an enable terminal, a voltage terminal and an output terminal, wherein the enable terminals are connected to a common enable terminal. The driving circuit receives the output terminals of the oscillators and increases a driving level of a selected one of the output terminals as a frequency output.