Shared Timeout Counter for Multi-Queue Error Detection

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Solution Overview

Problem

As computing systems and networks scale, tracking outstanding requests and detecting timeout events across multiple queues becomes resource-intensive, consuming significant compute resources.

Innovation Solution

Implementing a single clock signal for multiple queues, incrementing and decrementing a shared count value to detect timeout events, reducing the need for per-queue timing and memory usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If per-queue timing tracking is implemented for each request, then timeout detection accuracy is improved, but compute resource consumption increases

Engineering Contradiction:
Improvetimeout detection accuracyVSAvoidcompute resource consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent merges timing tracking for multiple queues into a single shared timer resource. Instead of maintaining separate timers for each queue, the system uses one timer that is shared across all queues, with each queue's timeout tracking being managed through software logic that increments/decrements counters based on the shared timer's state. This combining of hardware resources significantly reduces compute resource consumption while maintaining timeout detection capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared timer resource serves multiple functions simultaneously - it tracks timeouts for multiple different queues, provides a universal time reference for the system, and enables timeout detection across different communication protocols. This multi-functionality allows a single timer to replace what would traditionally require multiple dedicated timers, reducing overall resource consumption.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If separate timer resources are allocated for each queue, then timeout detection reliability is improved, but device complexity increases

Engineering Contradiction:
Improvetimeout detection reliabilityVSAvoidtimer resource management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple queue-specific timer functions into a single shared timer resource. The hardware complexity is reduced by eliminating the need for multiple separate timer circuits, while software logic manages the timing relationships for different queues. This merging approach maintains reliability through careful software management of the shared resource while significantly reducing device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces software logic as an intermediary between the shared timer hardware and the multiple queues. This intermediary layer manages the complexity of tracking timeouts for different queues by implementing counter increment/decrement logic based on the shared timer's state. The intermediary absorbs the management complexity, allowing the hardware to remain simple while maintaining reliable timeout detection.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If multiple independent timers are used for multiple queues, then timeout tracking precision is improved, but memory usage increases

Engineering Contradiction:
Improvetimeout tracking precisionVSAvoidmemory usage
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent merges the timing state representation for multiple queues into a single shared counter structure. Instead of allocating separate timer state memory for each queue, the system uses one shared counter that is incremented and decremented based on the shared timer's operation. This combining of memory resources maintains precise timeout tracking while significantly reducing overall memory usage.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent changes the parameter representation from multiple independent timer values to a single shared counter value with associated queue identifiers. By changing how timing state is parameterized - from separate time values per queue to a unified counter with queue indexing - the system maintains the ability to track timeouts precisely for each queue while using far less memory to represent the state.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12572402B1Accelerated timeout error detection
Publication Date: 2026.03.10 MICROSOFT TECHNOLOGY LICENSING LLC
  • US12572402B1 patent drawing
  • US12572402B1 patent drawing
  • US12572402B1 patent drawing

AI summary

Systems, methods, and techniques described herein provide timeout error detection in computing systems. In an aspect, a requesting entity transmits, in a first time interval and on behalf of a first queue, a first request to a responding entity. Responsive to transmitting the first request, the requesting entity increments a value of a count. The requesting entity transmits, in the first interval and on behalf of a second queue, a second request to a responding entity. Responsive to transmitting the second request, the requesting entity increments the value of the count. Responsive to receiving a response from the responding entity prior to expiration of a second time interval, the requesting entity decrements the value of the count. Subsequent to expiration of the second time interval, the requesting entity determines whether or not the value of the count is nonzero. If so, the requesting entity causes performance of a timeout action.