Shared Transmission Line for Semiconductor Memory Data Path

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Solution Overview

Problem

As semiconductor memory apparatuses increase in integration and data bandwidth, the number of metal lines required for data transmission becomes a limiting factor, necessitating a solution to reduce the number of transmission lines between the data pad and the data input/output unit.

Innovation Solution

A semiconductor memory apparatus utilizing a shared transmission line that couples a data pad to a data alignment unit and a pipe latch unit, with path selection units controlling the shared line for write and read operations, thereby reducing the number of metal lines needed and preventing data collisions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the number of data transmission lines is increased to improve data bandwidth, then data transmission capacity is improved, but the number of metal lines required increases causing integration limitations

Engineering Contradiction:
Improvedata bandwidthVSAvoidnumber of metal lines
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent combines separate write transmission lines and read transmission lines into a single shared transmission line. The shared transmission line is coupled to the data pad and can be selectively connected to either the data alignment unit (for write operations) or the pipe latch unit (for read operations) through path selection units, thereby reducing the total number of metal lines while maintaining full data bandwidth capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements dynamic path selection using control signals to switch the connection configuration of the shared transmission line. Path selection units respond to write control signals and read control signals to dynamically connect the shared transmission line to the appropriate unit (data alignment unit for writes, pipe latch unit for reads), enabling the system to adapt its data flow path based on operation type while using fewer physical lines.

Inventive Principle:
Principle #15Dynamics

2Reliability

If separate transmission lines are used for write and read operations, then data collision is prevented, but the number of metal lines increases beyond integration limits

Engineering Contradiction:
Improvedata collision preventionVSAvoidnumber of metal lines
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the write transmission path and read transmission path into a single shared transmission line. Path selection units ensure that only one path is active at a time by connecting the shared transmission line to either the data alignment unit (during write operations) or the pipe latch unit (during read operations), preventing data collisions while reducing the total number of metal lines required.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system dynamically switches the connection configuration based on operation type. During write operations, the path selection unit connects the shared transmission line to the data alignment unit; during read operations, it connects to the pipe latch unit. This dynamic switching maintains data collision prevention while utilizing fewer physical transmission lines.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9401186B2Semiconductor memory apparatus and data transmission
Publication Date: 2016.07.26 SK HYNIX INC
  • US9401186B2 patent drawing
  • US9401186B2 patent drawing
  • US9401186B2 patent drawing

AI summary

A semiconductor memory apparatus may include a data pad and a shared transmission line. The shared transmission line may be configured to transmit data received through the data pad to a data alignment unit in a write operation, and transmit data outputted from a pipe latch unit to the data pad in a read operation.