Shared Transposition Unit for Generalized Feistel Encryption

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Solution Overview

Problem

Generalized Feistel structures require separate transposition processing units for encryption and decryption, leading to increased hardware implementation scale and inefficiency, as they cannot share the same transposition processing unit, unlike Feistel structures.

Innovation Solution

An encryption processing device and method that employs a transposition processing unit capable of shared encryption and decryption operations by using specific transposition conditions and F-function processing units, eliminating the need for a selector to switch between encryption and decryption processes, thereby miniaturizing the hardware implementation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate transposition processing units are used for encryption and decryption in generalized Feistel structures, then the encryption and decryption processes can be independently optimized, but the hardware implementation scale increases and efficiency decreases

Engineering Contradiction:
Improveencryption and decryption process independenceVSAvoidhardware implementation scale
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the encryption and decryption transposition processing units into a single shared unit. The transposition processing unit is configured to perform both encryption transposition and decryption transposition operations by receiving control signals that indicate the operation type, thereby reducing hardware scale while maintaining functional independence of the processes

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The transposition processing unit is designed with multi-functionality to handle both encryption and decryption operations. It receives control information that specifies whether to perform encryption transposition or decryption transposition, allowing a single unit to serve multiple purposes and reducing overall device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If a selector is added to switch between encryption and decryption processes, then the transposition processing unit can be shared, but the device complexity and hardware scale increase

Engineering Contradiction:
Improveshared transposition processing capabilityVSAvoidselector and switching circuitry
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent eliminates the need for separate selectors by merging the control functionality directly into the transposition processing unit. The unit receives control information that simultaneously specifies both the operation type (encryption/decryption) and the transposition pattern, integrating what would have been separate selection functions into a unified control mechanism

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The transposition processing unit is designed to universally handle both encryption and decryption transposition operations through a single interface. The control information format is designed to encode multiple functions, allowing the unit to adapt its behavior based on the control signals without requiring additional switching components

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9124420B2Encryption processing device and encryption processing method
Publication Date: 2015.09.01 NEC CORP
  • US9124420B2 patent drawing
  • US9124420B2 patent drawing
  • US9124420B2 patent drawing

AI summary

A transposition processing unit having a k-partition generalized Feistel structure transposes Yb,u into Za,t if Ya,t (t=0, 1, . . . , s−1) is transposed into Zb,u (u=0, 1, . . . , s−1, u≠t), in a case where input data entered into the transposition processing unit is Y0, Y1, . . . , Yk−1 (n bits×k); output data from the transposition processing unit is Z0, Z1, . . . , Zk−1; Yi (i=0, 1, . . . , k−1) divided into s blocks (s=2, 4, . . . , n) is Yi, 0, Yi, 1, . . . , Yi, s−1; Zi divided into s blocks is Zi, 0, Zi, 1, . . . , Zi, s−1.