Shared Voltage Rail Control for Subsystem DCVS Conflicts
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Solution Overview
Problem
Conflicts arise in systems with subsystems sharing a voltage rail due to supply voltage being at a DCVS level suitable for one subsystem but not for others, leading to suboptimal performance and increased power consumption.
Innovation Solution
A power controller communicates the current state of the supply voltage to subsystems via interrupt service routines, allowing them to adjust their clock frequencies accordingly to match the available DCVS levels, ensuring optimal performance and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a shared voltage rail supplies the same supply voltage to multiple subsystems, then the system structure is simplified and ease of manufacture is improved, but subsystem performance deteriorates because each subsystem cannot receive its optimal voltage-frequency combination
Solution Approach 1:
The patent implements dynamic voltage-frequency scaling where the supply voltage and clock frequency to each subsystem are dynamically adjusted based on real-time voltage rail conditions and subsystem performance requirements. The controller continuously monitors the voltage rail status and sends control messages to clock sources to adjust clock frequencies, enabling subsystems to operate at optimal performance levels despite sharing a common voltage rail.
Solution Approach 2:
The system employs a feedback mechanism where the controller monitors the voltage rail status and receives performance information from subsystems, then sends control messages back to clock sources to adjust clock frequencies. This closed-loop feedback ensures that each subsystem receives appropriate clock frequency adjustments based on current voltage conditions, resolving the conflict between simplified structure and optimal performance.
2Productivity
If the supply voltage is increased to improve performance of one subsystem, then that subsystem's performance is improved, but power consumption increases and other subsystems on the same voltage rail suffer from excessive voltage
Solution Approach 1:
The patent applies local quality by providing customized clock frequency control to each individual subsystem based on its specific performance requirements and the current voltage rail conditions. Instead of uniformly increasing voltage for all subsystems, the controller sends targeted control messages to specific clock sources serving specific subsystems, allowing each subsystem to receive precisely the clock frequency adjustment it needs without affecting others unnecessarily, thus optimizing power consumption.
Solution Approach 2:
The system changes the clock frequency parameter dynamically based on voltage rail conditions and subsystem requirements. Rather than changing voltage to control performance, the patent adjusts clock frequency as the control parameter, which allows for fine-grained performance optimization without the quadratic power consumption increase associated with voltage scaling, since power consumption changes linearly with frequency rather than quadratically.
3Productivity
If the clock frequency is increased to improve subsystem performance, then productivity is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic clock frequency adjustment where the clock frequency supplied to each subsystem is continuously adapted based on real-time voltage rail conditions and subsystem performance requirements. The controller monitors system state and dynamically sends control messages to clock sources to adjust frequencies, enabling performance optimization only when and where needed, thus avoiding unnecessary power consumption increases while maintaining productivity when required.
Data Source
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Figure 3
Figure 4A
AI summary
The disclosure relates to a system including a set of subsystems sharing a voltage rail. The system includes a power controller configured to send messages, such as interrupts, to the subsystems concerning a change of state of a supply voltage on the voltage rail. Such messages may have been sent in response to requests and messages from the subsystems, respectively. In response to the messages, the subsystems may send requests to the power controller for different dynamic clock voltage scaling (DCVS) levels, respectively. In response to such requests, the power controller may set the supply voltage and frequencies of clock signals for the requesting subsystems, respectively.