Shared Backside Well Layout for Independent RF Back-Gate Bias
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Solution Overview
Problem
Existing semiconductor devices with independent radio frequency (RF) devices on separate islands within a semiconductor substrate face challenges of high wiring resistance and the inability to independently control back gate bias for multiple devices, leading to inefficient use of chip area.
Innovation Solution
The implementation of a shared common backside well and deep trench isolation structures allows for independent control of back gate bias across multiple RF blocks on a single diffusion region, utilizing fully-depleted semiconductor-on-insulator (FDSOI) technology with multi-finger MOSFETs and raised diffusion regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If multiple RF devices are placed on separate islands within a semiconductor substrate, then independent back gate bias control is achieved, but chip area increases and wiring resistance increases
Solution Approach 1:
The patent divides the common diffusion region into multiple segments using deep trench isolation structures, allowing each segment to be independently controlled while sharing the same diffusion region. This segmentation enables independent back gate bias control for multiple RF devices without requiring separate islands, thus reducing chip area while maintaining operational independence.
Solution Approach 2:
The patent merges multiple RF devices onto a single common diffusion region (common well), combining what would traditionally require separate islands. This merging reduces the total chip area while the deep trench isolation structures provide the necessary electrical separation for independent control of each device's back gate bias.
2Ease of operation
If multiple RF devices are placed on separate islands within a semiconductor substrate, then independent back gate bias control is achieved, but wiring resistance increases
Solution Approach 1:
The deep trench isolation structures create electrically isolated segments within the common diffusion region, allowing independent bias control without requiring long inter-island wiring connections. This segmentation reduces the wiring length and cross-sectional area, thereby reducing wiring resistance and improving signal integrity.
3Area of stationary object
If multiple devices are built on a single island, then chip space is reduced, but independent back gate bias control is lost
Solution Approach 1:
The patent uses deep trench isolation structures to segment the common diffusion region into multiple independently controllable zones. This segmentation allows multiple RF devices to share a single island (reducing chip area) while maintaining independent back gate bias control through the isolated regions.
Solution Approach 2:
The deep trench isolation structures act as intermediary elements that provide electrical separation between adjacent devices on the same diffusion region. These isolation structures enable independent control of back gate bias for each device while allowing them to share the common diffusion region, thus reducing chip area without sacrificing operational independence.
4Ease of operation
If deep trench isolation structures are added to enable independent control on a single diffusion, then device complexity increases, but independent bias control is achieved
Solution Approach 1:
The patent introduces deep trench isolation structures that extend vertically through the substrate, creating isolation in the depth dimension. This vertical dimension approach enables electrical separation of devices on the same planar diffusion region, achieving independent control without requiring complex lateral separation or additional control layers.
Data Source
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to semiconductor devices with a shared common backside well and methods of manufacture. The structure includes: adjacent gate structures over a semiconductor substrate; a common well in the semiconductor substrate under the adjacent gate structures; a deep trench isolation structure extending through the common well between the adjacent gate structures; and a shared diffusion region between the adjacent gate structures.