Sharp-Corner Interconnect Patterning for Lower Contact Resistance

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Solution Overview

Problem

As MOS devices are downscaled, the linewidths of interconnect features and the spacing between them become smaller, leading to increased optical proximity effects, rounded line ends, reduced effective contact areas, and increased contact resistance.

Innovation Solution

The formation of interconnect features with sharper corners is achieved through a process that involves cutting metal gates, source/drain contact plugs, and metal lines into shorter portions, resulting in sharper corner profiles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the linewidths of interconnect features are reduced to accommodate device downsaling, then the device density is improved, but the line ends become rounded and the effective contact area is reduced

Engineering Contradiction:
Improvedevice densityVSAvoidline end sharpness
Core Design Contradiction:
Quantity of substanceVSShape

Solution Approach 1:

The patent applies preliminary action by performing a first etch process with a biased RF power source before the second etch process. This preliminary etching step with controlled power conditions prepares the interconnect features with sharper corners before the final patterning, preventing the rounding that would otherwise occur during subsequent processing steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes parameter changes by varying the RF power source bias between two distinct etching processes. The first etch uses one set of power parameters to achieve corner sharpness, while the second etch uses different parameters to complete the patterning. This parameter variation enables control over the corner radius while maintaining the reduced linewidths required for high device density.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If the linewidths of interconnect features are reduced, then the device density is improved, but the contact resistance is increased

Engineering Contradiction:
Improvedevice densityVSAvoidcontact resistance
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The first etch process with biased RF power serves as a preliminary action that creates sharper corner profiles before the second etch. This preliminary corner sharpening increases the effective contact area available for landing overlying conductive features, thereby reducing contact resistance even as linewidths are reduced for higher device density.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If the line ends are rounded due to optical proximity effects, then the manufacturing process is simpler, but the effective contact area is reduced

Engineering Contradiction:
Improvepatterning simplicityVSAvoideffective contact area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent performs a preliminary etch with biased RF power that actively creates sharp corners during the patterning process itself, rather than requiring separate post-processing steps. This preliminary corner formation maintains effective contact area while keeping the overall manufacturing process relatively simple by integrating the corner-sharpening function into the existing multi-step etch sequence.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12283617B2Interconnect features with sharp corners and method forming same
Publication Date: 2025.04.22 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12283617B2 patent drawing
  • US12283617B2 patent drawing
  • US12283617B2 patent drawing

AI summary

A method includes depositing a dielectric layer, depositing a plurality of mandrel strips over the dielectric layer, and forming a plurality of spacers on sidewalls of the plurality of mandrel strips to form a plurality of mask groups. Each of the plurality of mandrel strips and two of the plurality of spacers form a mask group in the plurality of mask groups. The method further includes forming a mask strip connecting two neighboring mask groups in the plurality of mask groups, using the plurality of mask groups and the mask strip collectively as an etching mask to etch the dielectric layer and to form trenches in the dielectric layer, and filling a conductive material into the trenches to form a plurality of conductive features.