Shielded Embedded Inductors for SERDES-Safe Chip Packages
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Solution Overview
Problem
Magnetic core inductors embedded in chip packages introduce parasitic inductance, crosstalk, and loss to power and data lines due to the magnetic field they generate, which is particularly problematic for high-speed signal routing in SERDES channels.
Innovation Solution
A chip package with a magnetic core inductor shielded by a plated metal layer, where the magnetic inductor is embedded in a package substrate with a metal layer directly plated on the magnetic inlay, and optionally a second metal layer between the inductor and the metal traces, to reduce interference from the magnetic field.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If magnetic core inductors are embedded in chip packages to provide high inductance in small form factor, then inductance density is improved, but parasitic inductance, crosstalk, and loss to power and data lines are introduced
Solution Approach 1:
A non-magnetic shield layer is introduced as an intermediary between the magnetic core inductor and the surrounding power and data lines. This shield layer acts as a mediator that blocks the magnetic field from the inductor from coupling with adjacent signal lines, thereby reducing parasitic inductance and crosstalk while preserving the high inductance density of the embedded inductor structure.
Solution Approach 2:
The magnetic field generated by the inductor, which causes harmful interference, is managed by introducing a shield layer that converts the problematic magnetic coupling into a controlled configuration. The shield layer captures and redirects the magnetic flux, transforming the harmful crosstalk effect into a contained magnetic field that does not interfere with adjacent lines.
2Power
If magnetic core inductors are used for power regulation, then power delivery is improved, but signal delay and loss in SERDES channels are increased
Solution Approach 1:
The non-magnetic shield layer serves as a protective intermediary that separates the high-power magnetic field environment of the inductor from the sensitive high-speed data lines. This shield prevents the magnetic field from inducing noise and signal degradation in the SERDES channels, thereby maintaining signal integrity while allowing the inductor to provide robust power delivery.
Solution Approach 2:
The shield layer is strategically positioned only in the regions where magnetic field interference is most problematic, specifically between the inductor and the SERDES channels. This localized shielding approach maintains power delivery performance in the inductor region while protecting signal integrity in the data line regions, optimizing both functions with spatially differentiated protection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The shielding metal layers effectively reduce signal delay and loss in electronic components, such as SERDES channels, by minimizing the interference from the magnetic field generated by the magnetic core inductor.
Implementation Method 1
a first metal layer disposed in the cavity on the surfaces of the magnetic inlay below the plurality of build-up layers. A second metal layer may be further disposed between the first metal layer and the metal traces. Both the first and second metal layers may be floating or grounded. The first and second metal layers are configured to shield other electronic components from being interfered by the magnetic field generated by the magnetic core inductor.
Data Source
AI summary
Disclosed herein are a package substrate, a chip package, and method for fabricating the same. The package substrate includes a package core comprising vias; a plurality of build-up layers disposed on an upper surface of the package core, the plurality of build-up layers comprising metal traces connected with the vias; and a magnetic core inductor disposed in a cavity of the package core. The magnetic core inductor includes a magnetic inlay, and a first metal layer disposed in the cavity on the magnetic inlay below the plurality of build-up layers. A second metal layer may be further disposed between the first metal layer and the metal traces. Both the first and second metal layers may be floating or grounded. The first and second metal layers are configured to shield other electronic components from being interfered by the magnetic field generated by the magnetic core inductor.