Shielded Gate MOSFET Oxide Thickness Control
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Solution Overview
Problem
Current fabricating methods for shielded gate MOSFETs either result in non-uniform oxide layers with poor insulation properties or require expensive specialized equipment for accurate thickness control, limiting the yield and applications of the devices.
Innovation Solution
A method involving the formation of a semiconductor substrate with a trench, a sacrifice oxide layer, and subsequent deposition and etching of polycrystalline silicon regions to control the thickness of insulation and gate oxide layers, allowing for precise control without the need for specialized machines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thick oxide layer is made to improve insulation property between gate and source, then the insulation property is improved, but the threshold voltage of the MOSFET will be increased, such that the types and applications of products will be limited
Solution Approach 1:
The oxide layer is segmented into two distinct parts: a first oxide layer formed during gate oxide formation, and a second oxide layer formed by oxidizing the sacrificial polycrystalline silicon layer. This segmentation allows independent optimization of each layer's thickness and properties, enabling sufficient insulation ( thicker second layer) without excessive threshold voltage increase (controlled first layer), thus resolving the contradiction between insulation property and product adaptability
Solution Approach 2:
A sacrificial polycrystalline silicon layer is introduced as an intermediary material that serves multiple functions: it acts as a mask during etching, provides a source of oxide material when oxidized, and enables precise control of the second oxide layer thickness. This intermediary allows the formation of a thick, uniform insulation layer without directly impacting the gate oxide quality, thereby maintaining both insulation property and threshold voltage control
2Manufacturing precision
If a thick oxide layer is deposited and then back etched to control thickness, then the thickness uniformity is improved, but special expensive machine is required and the process becomes complex
Solution Approach 1:
A sacrificial polycrystalline silicon layer is deposited in advance before gate oxide formation. This preliminary layer serves as a thickness template that determines the final oxide layer thickness through controlled oxidation. By preparing this sacrificial layer beforehand, the method achieves precise thickness control without requiring complex back-etching equipment, thus improving manufacturing precision while avoiding process complexity
Solution Approach 2:
The method changes the approach from mechanical/chemical removal (back etching) to thermal growth (oxidation) for thickness control. By oxidizing the sacrificial polycrystalline silicon layer at controlled temperatures and times, the second oxide layer thickness is precisely determined by oxidation kinetics rather than etch depth, achieving uniform thickness with standard thermal processing equipment instead of expensive specialized machines
3Ease of manufacture
If the gate oxide layer and isolation oxide layer are produced at the same time, then the fabricating process is simplified, but the uniformity of the isolation layer cannot be controlled and the insulation property is poor
Solution Approach 1:
The oxide formation process is segmented into two separate stages: first, the gate oxide layer is formed by oxidizing the semiconductor substrate; second, the isolation oxide layer is formed by oxidizing the sacrificial polycrystalline silicon layer. This temporal and functional segmentation allows each oxide layer to be optimized independently, ensuring both process simplicity and precise control over isolation layer uniformity and insulation property
Solution Approach 2:
The sacrificial polycrystalline silicon layer acts as an intermediary that enables controlled formation of the isolation oxide layer. By oxidizing this sacrificial layer after gate oxide formation, the method achieves uniform isolation layer thickness determined by the sacrificial layer's dimensions and oxidation conditions, while maintaining simple fabrication steps. The intermediary approach decouples the formation processes, allowing independent optimization of both layers
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables effective control of oxide layer thickness and insulation properties, improving the yield and versatility of shielded gate MOSFETs while avoiding the use of expensive equipment.
Implementation Method 1
forming a sacrifice oxide layer in the trench in an oxidizing manner, the sacrifice oxide layer at least covering a side wall of the trench
Implementation Method 2
forming an insulation oxide layer above the source polycrystalline silicon region in an oxidizing manner to have the source polycrystalline silicon region fully enclosed by the sacrifice oxide layer and the insulation oxide layer
Implementation Method 3
forming a gate oxide layer in the trench in an oxidizing manner, the gate oxide layer at least covering the side wall of the trench
Data Source
AI summary
A fabricating method of a shielded gate MOSFET is provided, includes the steps of forming a semiconductor substrate having a trench, forming a sacrifice oxide layer in the trench, the sacrifice oxide layer covering a side wall of the trench, forming a source polycrystalline silicon region in the trench, forming an insulation oxide layer above the source polycrystalline silicon region to have the source polycrystalline silicon region fully enclosed by the sacrifice oxide layer and the insulation oxide layer, depositing polycrystalline silicon into the trench and carrying out a back etching to control a thickness of the insulation oxide layer above the source polycrystalline silicon region, forming a gate oxide layer in the trench, the gate oxide layer covering the side wall of the trench, forming a gate polycrystalline silicon region in the trench, and forming a body layer and a heavily doped region around the trench in an ion implantation manner.