Shielded Gate MOSFET Formation via Plasma Etching Back
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Solution Overview
Problem
The high manufacturing cost of Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) with shielded gate structures due to the conventional chemical mechanical polishing method, which is costly and difficult to reduce.
Innovation Solution
A method that replaces chemical mechanical polishing with etching back processes to form a shielded gate structure, involving high temperature plasma deposition and poly etching back, reducing manufacturing costs and enhancing MOSFET performance by minimizing gate charge.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If chemical mechanical polishing method is used to form inter-poly oxide region, then manufacturing precision is improved, but manufacturing cost increases
Solution Approach 1:
The patent replaces the chemical mechanical polishing (CMP) process with a plasma etching back process to form the inter-poly oxide region. This substitution eliminates the need for mechanical polishing equipment and consumables, significantly reducing manufacturing costs while maintaining the required precision for the shielded gate structure formation.
Solution Approach 2:
The patent changes the process parameters by using plasma etching instead of mechanical polishing. By controlling plasma power, gas flow rates, and etching time, the method achieves the desired oxide region formation with lower cost and comparable precision, resolving the contradiction between manufacturing precision and cost.
2Reliability
If shielded gate structure is formed, then MOSFET performance is improved through reduced gate charge, but manufacturing complexity increases
Solution Approach 1:
The patent segments the gate structure into distinct regions: the shielded gate poly region and the inter-poly oxide region. This segmentation allows for selective formation and control of each region, enabling the shielded gate structure to be integrated into the existing MOSFET manufacturing process without overwhelming complexity.
Solution Approach 2:
The patent performs preliminary actions by forming the bottom gate oxide region and shielded gate poly region before completing the main gate structure. This preliminary formation of the shielded gate components allows for systematic integration into the manufacturing flow, managing complexity through staged process design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method reduces manufacturing costs and enhances MOSFET performance by effectively forming a shielded gate structure with reduced gate charge, thereby improving the overall efficiency and affordability of MOSFET production.
Implementation Method 1
forming an inter-poly oxide region on the shielded gate poly region through high temperature plasma deposition
Data Source
AI summary
A method for forming a shielded gate of a MOSFET includes steps as following: providing a semiconductor substrate having at least one trench, forming a bottom gate oxide region and a shielded gate poly region in the trench of the semiconductor substrate, forming an inter-poly oxide region on the shielded gate poly region through high temperature plasma deposition, poly etching back and oxide etching back; and forming a gate oxide region and a gate poly region on the inter-poly oxide region. By utilizing the etching back processes in replace of traditional chemical mechanical polishing processes, the manufacturing cost of manufacturing a shielded gate structure is reduced, and the total cost of manufacturing a FET is also reduced. Meanwhile, the gate charge is effectively reduced due to the shielded gate structure, so that the performance of a MOSFET is enhanced.