Shielded Gate Transistor Decoupled Electrode Scaling
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Solution Overview
Problem
Conventional shielded gate trench MOSFETs face challenges in scaling down due to differing insulating requirements for shield and gate electrodes, leading to increased source-drain resistance and reduced breakdown voltage, as the cell pitch reduction necessitates thinner oxides for gate electrodes but thicker oxides for shield electrodes, causing manufacturing limitations.
Innovation Solution
Decoupling the shield and gate electrode structures by forming them at different levels and orientations, allowing independent optimization of cell and shield pitches, and using separate masks to ensure adequate insulation and prevent breakdown.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If cell pitch is reduced to decrease on-resistance, then source-drain resistance decreases, but oxide thickness must be reduced which compromises insulation and breakdown voltage
Solution Approach 1:
The patent divides the electrode structure into separate shield electrodes and gate electrodes that are formed independently. This segmentation allows the cell pitch to be reduced for lower on-resistance while the shield electrode spacing can be maintained independently to ensure adequate insulation and breakdown voltage protection.
Solution Approach 2:
The patent transitions from a planar configuration where shield and gate electrodes are formed in the same trench to a three-dimensional structure where shield electrodes are formed at a first level and gate electrodes are formed at a second level. This dimensional change enables independent optimization of horizontal spacing for breakdown voltage and vertical integration for reduced on-resistance.
2Productivity
If cell pitch is reduced to improve device density, then productivity increases, but manufacturing precision requirements increase due to insufficient room for thick oxide
Solution Approach 1:
By segmenting the electrode formation into separate shield electrode and gate electrode processes, the patent allows independent control of oxide thickness for each electrode type. This enables maintenance of thick oxide for shield electrodes (for breakdown protection) while using thinner oxide for gate electrodes, even at reduced cell pitches.
Solution Approach 2:
The vertical stacking of shield and gate electrodes creates additional space in the vertical dimension, allowing adequate oxide thickness to be maintained even when horizontal cell pitch is reduced. This enables higher device density without compromising manufacturing precision for oxide deposition.
3Reliability
If separate masks are used to form shield and gate electrodes, then insulation is improved, but device complexity increases
Solution Approach 1:
The patent uses separate masks for forming shield electrodes and gate electrodes, which provides better electrical insulation between these structures. While this increases fabrication process complexity, it ensures reliable insulation and prevents breakdown, which is critical for device performance and safety.
Solution Approach 2:
The vertical separation of shield and gate electrodes into different levels provides natural electrical insulation, which complements the separate mask approach. This three-dimensional arrangement reduces the risk of insulation failure while the structured process flow manages the increased fabrication complexity.
Data Source
AI summary
A shielded gate transistor device may include one or more shield electrodes formed in a semiconductor substrate at a first level and one or more gate electrodes formed in the semiconductor substrate at a second level that is different from the first level. One or more portions of the one or more gate electrodes overlap one or more portions of the one or more shield electrodes. At least a portion of the gate electrodes is oriented non-parallel to the one or more shield electrodes. The shield electrodes are electrically insulated from the semiconductor substrate and the one or more gate electrodes are electrically insulated from the substrate and shield electrodes.