Shielded Gate Trench MOSFETs with Floating and Channel Stop Gates
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Solution Overview
Problem
Existing trench MOSFET designs face performance degradation in breakdown voltage due to leakage paths formed by floating trenched gates in the termination area, which allow electrical current to flow from the edge of the termination area to the n+ source regions in the active area.
Innovation Solution
The introduction of channel stop gates in the termination area, connected to sawing trenched gates that extend across the scribe line, prevents leakage paths by ensuring electrical shorts after die sawing, and the use of multiple floating trenched gates with trench depths equal to or deeper than the junction depth of body regions, surrounded by body regions without source regions, maintains breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If multiple floating trenched gates are used in the termination area, then the breakdown voltage is improved, but leakage paths form between drain and source regions
Solution Approach 1:
The termination area is segmented into multiple floating trenched gates arranged in parallel, each gate acting as an independent barrier. This segmentation allows the structure to maintain high breakdown voltage through multiple barriers while the specific configuration prevents continuous leakage paths between drain and source regions.
Solution Approach 2:
The floating trenched gates are positioned at specific locations in the termination area with optimized spacing and depth. Each gate has local electrical characteristics that differ from the active area, creating regions of high electric field containment while preventing lateral leakage through the epitaxial layer to the source regions.
2Strength
If floating trenched gates are placed deep in the epitaxial layer, then breakdown voltage is enhanced, but manufacturing complexity increases
Solution Approach 1:
The trench depth of floating gates is optimized to a specific parameter range that is equal to or deeper than the junction depth of body regions. This parameter change ensures that the gates extend sufficiently deep to prevent leakage paths while remaining manufacturable with standard fabrication processes, avoiding excessive depth that would cause manufacturing difficulties.
3Loss of energy
If shielded trenched gates are used in the active area, then specific on-resistance is reduced, but the termination area performance degrades
Solution Approach 1:
The device is segmented into two distinct areas: the active area with shielded trenched gates optimized for low on-resistance, and the termination area with floating trenched gates optimized for high breakdown voltage. This spatial segmentation allows each area to be independently optimized without compromising the other, resolving the contradiction between low resistance and high breakdown voltage.
Solution Approach 2:
Different gate structures are applied to different locations: shielded gates in the active area for low resistance and floating gates in the termination area for high breakdown voltage. Each location has locally optimized characteristics that match its functional requirements, preventing the degradation of termination performance while maintaining low on-resistance in the active area.
Data Source
AI summary
A trench MOSFET is disclosed having shielded trenched gates in active area, multiple floating trenched gates and at least one channel stop trenched gate in termination area. A semiconductor power device layout is disclosed consisting of at least two said trench MOSFETs connected together with multiple sawing trenched gates across a space between the two trench MOSFETs having a width same as scribe line, making the invented trench MOSFET be feasibly achieved without degraded performance.