Shielded Memory Architecture with Interleaved Plate Lines

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Solution Overview

Problem

Conventional memory devices experience electrical interference, known as 'fringing,' between voltage lines, leading to signal distortion and data errors due to the proximity of sense lines with varying voltages.

Innovation Solution

An alternating pattern of plate and sense lines is implemented in the memory architecture, where plate lines with constant voltages provide shielding to sense lines, reducing fringing effects and associated signal distortions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If sense lines are placed close to storage components for efficient access, then memory access speed is improved, but electrical interference (fringing) between lines increases causing signal distortion

Engineering Contradiction:
Improvememory access speedVSAvoidelectrical interference
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

A ground line is introduced as an intermediary element between sense lines and plate lines. This ground line acts as a shield that intercepts and redirects electrical interference, preventing fringing effects from reaching the sense lines while maintaining close proximity for efficient memory access

Inventive Principle:
Principle #24Intermediary (Mediator)

2Area of stationary object

If plate lines and sense lines are routed adjacently to reduce area, then device area is minimized, but signal distortion due to fringing increases

Engineering Contradiction:
Improvememory device areaVSAvoidsignal integrity
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

Ground lines are positioned between plate lines and sense lines to create electrical shielding. This intermediary structure prevents direct coupling between the lines, reducing fringing effects and signal distortion while maintaining compact routing for minimal area occupation

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If sense lines carry varying voltages for data representation, then data storage capability is enabled, but electrical interference and fringing effects are generated

Engineering Contradiction:
Improvedata storage capabilityVSAvoidelectrical interference
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The varying voltages on sense lines that generate fringing effects are managed by introducing ground lines that convert the harmful interference into controlled electrical fields. The ground lines absorb and redirect the fringing energy, allowing the sense lines to maintain their data-carrying function while eliminating the harmful effects

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The alternating pattern effectively minimizes electrical interference, thereby reducing signal distortion and data errors, enhancing the reliability of memory operations.

Implementation Method 1

plate lines with constant voltages provide shielding to sense lines, reducing fringing effects and associated signal distortions

Methodology Applied
Scientific EffectElectrostatic shielding: Electric Field

Data Source

PatentUS11335644B2Apparatuses and methods for shielded memory architecture
Publication Date: 2022.05.17 MICRON TECHNOLOGY INC
  • US11335644B2 patent drawing
  • US11335644B2 patent drawing
  • US11335644B2 patent drawing

AI summary

Apparatuses and methods for memory that includes a first memory cell including a storage component having a first end coupled to a plate line and a second end coupled to a digit line, and a second memory cell including a storage component having a first end coupled to a digit line and a second end coupled to a plate line, wherein the digit line of the second memory cell is adjacent to the plate line of the first memory cell.