Shielded Semiconductor Package Layout for RF EMI and Heat Dissipation

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Solution Overview

Problem

Current semiconductor packages face challenges in effectively shielding electromagnetic interference between different components, improving heat dissipation, and optimizing antenna design for omnidirectional coverage and sensitivity, particularly in high-frequency and multi-band RF environments.

Innovation Solution

A semiconductor package with a core structure featuring through-holes, metal layers on encapsulants, and metal vias to connect these layers, which includes redistribution layers and passive components to minimize electromagnetic interference and enhance heat dissipation, while integrating with an antenna module for improved antenna reception.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple chips and components are integrated in a single package, then device functionality is improved, but electromagnetic interference between components increases

Engineering Contradiction:
Improvedevice functionalityVSAvoidelectromagnetic interference
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The package is divided into multiple blocks with each block containing specific components (RF chips, AP chips, passive components). Metal partitions are introduced to further segment the internal space, creating isolated cavities for different component groups. This segmentation allows multiple functional blocks to coexist while minimizing electromagnetic interference between them.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Metal partitions and grounding structures serve as intermediary elements between different component blocks. These metal structures act as electromagnetic shields, blocking interference paths while allowing the package to maintain a compact integrated form. The grounding connections provide a reference potential that further isolates adjacent blocks.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Volume of moving object

If package size is reduced, then integration density is improved, but heat dissipation capability deteriorates

Engineering Contradiction:
Improvepackage sizeVSAvoidheat dissipation capability
Core Design Contradiction:
Volume of moving objectVSTemperature

Solution Approach 1:

Heat dissipation pathways are extended in the vertical dimension through multiple encapsulant layers and metal partition structures. The metal partitions serve dual purposes: electromagnetic shielding and heat conduction pathways. Heat can dissipate through multiple routes including lateral paths along metal partitions and vertical paths through encapsulant layers, effectively managing thermal load in a compact volume.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If signal path between antenna and chip is minimized, then signal integrity is improved, but package design complexity increases

Engineering Contradiction:
Improvesignal integrityVSAvoidpackage design complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The metal partitions serve multiple functions simultaneously: they act as electromagnetic shields between blocks, provide grounding references for RF signals, serve as heat dissipation pathways, and function as structural support elements. This multi-functionality reduces the need for separate dedicated structures, thereby managing complexity while achieving signal integrity goals.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Object-affected harmful factors

If metal layers are added for electromagnetic shielding, then interference protection is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectromagnetic interference protectionVSAvoidmanufacturing complexity
Core Design Contradiction:
Object-affected harmful factorsVSEase of manufacture

Solution Approach 1:

The metal partitions are integrated with the encapsulant structure during the packaging process. The partitions are positioned and secured within encapsulant layers, combining the shielding function with the existing encapsulation process. This integration approach avoids adding completely separate manufacturing steps while achieving electromagnetic shielding.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively shields electromagnetic interference, enhances heat dissipation, and improves antenna reception sensitivity and omnidirectional coverage, enabling compact and efficient semiconductor packages for high-frequency applications.

Implementation Method 1

metal layers are formed on inner walls of the respective openings and through-holes, metal layers are formed on an encapsulant, a metal via layer is formed to connect the metal layers, thereby preventing electromagnetic interference between the different types of blocks

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Implementation Method 2

metal layers are formed on inner walls of the respective openings and through-holes, metal layers are formed on an encapsulant, a metal via layer is formed to connect the metal layers, thereby preventing electromagnetic interference between the different types of blocks, improving a heat dissipation effect

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS12148708B2Semiconductor package and antenna module comprising the same
Publication Date: 2024.11.19 SAMSUNG ELECTRONICS CO LTD
  • US12148708B2 patent drawing
  • US12148708B2 patent drawing
  • US12148708B2 patent drawing

AI summary

A semiconductor package including a core structure, in which a first and second semiconductor chips and passive components are embedded, a connection structure disposed on a first side of the core structure, and including a redistribution layer electrically connected to the first and second semiconductor chips and the passive components, and a metal pattern layer and a backside wiring layer disposed on a second side of the core structure opposing the first side, and spaced apart from each other. The core structure includes a first metal layer surrounding the first semiconductor chip, a second metal layer surrounding the first semiconductor chip, and the first metal layer, a third metal layer surrounding the second semiconductor chip, and a fourth metal layer surrounding the second semiconductor chip, the passive components, and the third metal layer, and each of the first to fourth metal layers is electrically connected to the metal pattern layer.