Shielded Redistribution Substrates for Reliable Semiconductor Packaging

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Solution Overview

Problem

Existing semiconductor packages face challenges in achieving improved electrical properties and increased reliability due to limitations in the design and structure of redistribution substrates and shield structures.

Innovation Solution

The semiconductor package incorporates a layered structure comprising lower and upper redistribution substrates with dielectric and conductive patterns, and shield structures that surround the redistribution patterns, enhancing electrical connectivity and mechanical stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If shield structures are added around redistribution patterns, then electromagnetic wave blocking is improved, but device complexity increases

Engineering Contradiction:
Improveelectromagnetic wave blockingVSAvoiddevice complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The shield structure is nested within the redistribution substrate, with the lower shield structure positioned between the lower redistribution pattern and the semiconductor chip, and the upper shield structure positioned between the upper redistribution pattern and the connection dielectric layer. This nested configuration provides electromagnetic shielding without adding external components, thus improving EM wave blocking while minimizing increases in device complexity.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If multiple redistribution patterns are stacked, then electrical connectivity is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveelectrical connectivityVSAvoidmanufacturing precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The redistribution substrate is segmented into multiple functional layers: lower dielectric structure with lower redistribution pattern, connection dielectric layer with connection conductive structure, and upper dielectric structure with upper redistribution pattern. Each layer is formed through separate fabrication steps with defined interfaces, allowing for modular manufacturing and alignment references that reduce overall precision requirements compared to a monolithic multi-layer structure.

Inventive Principle:
Principle #1Segmentation

3Object-affected harmful factors

If shield structure length is increased, then electromagnetic wave blocking is improved, but warpage increases

Engineering Contradiction:
Improveelectromagnetic wave blockingVSAvoidwarpage
Core Design Contradiction:
Object-affected harmful factorsVSStability of the object's composition

Solution Approach 1:

The shield structure is designed with varying local properties: the lower shield structure has a length greater than the semiconductor chip length to provide adequate shielding at the chip interface, while the upper shield structure has a length greater than the connection conductive structure but less than the full substrate length. This localized optimization provides sufficient EM wave blocking at critical interfaces while minimizing overall shield structure length to reduce warpage.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250029935A1Semiconductor package
Publication Date: 2025.01.23 SAMSUNG ELECTRONICS CO LTD
  • US20250029935A1 patent drawing
  • US20250029935A1 patent drawing
  • US20250029935A1 patent drawing

AI summary

Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a lower redistribution substrate, an upper redistribution substrate, and a semiconductor chip between the lower redistribution substrate and the upper redistribution substrate. The lower redistribution substrate includes a lower dielectric structure, a lower redistribution pattern surrounded by the lower dielectric structure, and a lower shield structure surrounded by the lower dielectric structure and surrounding the lower redistribution pattern. The upper redistribution substrate includes an upper dielectric structure, an upper redistribution pattern surrounded by the upper dielectric structure, and an upper shield structure surrounded by the upper dielectric structure and surrounding the upper redistribution pattern.