Shielded Socket Carrier for High-Volume Semiconductor Testing

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Solution Overview

Problem

Conventional automated test equipment (ATE) systems for high-volume testing of semiconductor devices face limitations such as low units per hour (UPH) due to time-consuming pick-and-place mechanisms, limited parallelism, and difficulties in maintaining signal fidelity and high-speed signal path calibration.

Innovation Solution

The proposed solution involves a high-performance, scalable, and cost-effective ATE system that includes a tester board with sockets, a passive carrier to hold multiple devices, and a parallel cover assembly system for RF shielding. This system maintains continuous connections for test circuitry, allowing for high-parallelism and high UPH without repeated signal path disconnections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If pick-and-place mechanisms are used to load DUTs into sockets, then devices can be tested, but units per hour (UPH) is reduced due to time-consuming operations

Engineering Contradiction:
Improveunits per hour (UPH)VSAvoidtime for pick-and-place operations
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

Devices are pre-loaded onto carriers in batches before testing begins. The carrier is prepared in advance with multiple DUTs positioned ready for simultaneous testing, eliminating the need for individual pick-and-place operations during the testing process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Multiple DUTs are combined on a single carrier that is inserted into the testing chamber as one unit. The socket array on the carrier simultaneously contacts multiple devices, merging individual testing operations into a parallel batch process that dramatically increases UPH.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If individual plunging mechanisms are used at each testing site, then electrical connections can be made, but device complexity and system cost increase

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidnumber of independent plunging mechanisms
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Multiple independent plunging mechanisms are merged into a single plunger assembly that simultaneously actuates all socket contacts across the carrier. This single mechanism provides coordinated force to all electrical connections, reducing system complexity while maintaining reliable contact across all DUTs.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If TIBs are repeatedly disconnected and reconnected during operation, then device changes can be accommodated, but signal fidelity and high-speed signal path calibration deteriorate

Engineering Contradiction:
Improveability to change devicesVSAvoidsignal fidelity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

Device changes are prepared in advance by loading different DUTs onto carriers before insertion. The carrier with pre-positioned devices is inserted as a complete unit, allowing device adaptation without disrupting the electrical connection between the TIB and the testing system.

Inventive Principle:
Principle #10Preliminary action

4Measurement precision

If test sites are electrically shielded to reduce interference, then measurement precision improves, but device complexity and shielding requirements increase

Engineering Contradiction:
Improvetest measurement accuracyVSAvoidshielding structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The carrier itself is designed with integrated shielding structures that nest within the testing chamber environment. The carrier provides per-DUT shielding that is built into the device holder, eliminating the need for separate complex shielding structures around each test site while maintaining measurement precision.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution achieves improved performance, reliability, and reduced costs by maintaining signal fidelity and high-speed signal path accuracy, while enabling high-parallelism and high UPH in high-volume manufacturing configurations.

Implementation Method 1

a socket cover array configured to apply downward force on a device under test (DUT) into a socket

Methodology Applied
Scientific EffectMechanical Force: Mechanical Force

Implementation Method 2

an RF shield array Disposed over the Array of DUTs in the carrier, wherein each RF shield of the RF shield array is configured to block radio frequency interference

Methodology Applied
Scientific EffectElectromagnetic Shielding: Faraday Cage

Data Source

PatentUS12203958B2Shielded socket and carrier for high-volume test of semiconductor devices
Publication Date: 2025.01.21 ADVANTEST TEST SOLUTIONS INC
  • US12203958B2 patent drawing
  • US12203958B2 patent drawing
  • US12203958B2 patent drawing

AI summary

A test apparatus comprising a tester interface board (TIB) affixed in a slot of a tester rack, wherein the TIB comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT). The test apparatus further comprises a carrier comprising an array of DUTs, wherein the carrier is operable to slide into the slot of the tester rack, and wherein each DUT in the array of DUTs aligns with a respective socket on the TIB. Further, the test apparatus comprises a plurality of socket covers, wherein each socket cover of the plurality of socket covers is operable to actuate a top portion of each DUT of the array of DUTs in the carrier.