Shielded IC Packaging via Stack-Through-Via

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Solution Overview

Problem

There is a need for integrated circuit packaging systems that are thinner and more compact to reduce size while maintaining performance and speed, with existing solutions failing to effectively address the challenges of miniaturization and cost reduction in a competitive market.

Innovation Solution

The solution involves a method of manufacturing an integrated circuit packaging system that includes a substrate assembly with a connection path, a base device with a mount layer, a stack device having a stack die and stack-organic-material, and a stack-through-via connected to the substrate assembly, with a shield layer applied directly to the stack-through-via for improved electrical grounding and shielding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If parts in the package are made thinner to reduce size, then the package size is reduced, but manufacturing complexity and difficulty increase

Engineering Contradiction:
Improvepackage sizeVSAvoidmanufacturing complexity
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The package is divided into multiple thin layers including substrate, organic material layers, and conductive via structures. Each layer is manufactured and assembled separately, allowing for precise control of thickness and reduced overall package size while maintaining manufacturability through modular construction

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from planar circuit board layouts to three-dimensional stacked architecture with vertical vias and multiple organic material layers. This dimensional change allows increased functionality and routing capacity within a reduced footprint, addressing the size reduction requirement while managing complexity through vertical integration

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If more functionality and speed are increased in smaller packages, then performance is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvefunctionality and speedVSAvoidmanufacturing precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

Different organic material layers are used with varying properties optimized for specific functions - some layers provide electrical insulation, others provide structural support or signal routing. This local differentiation allows high functionality in specific regions while maintaining overall manufacturing feasibility through standardized processes

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Organic material layers serve as intermediary structures between the substrate and upper circuit elements, providing both mechanical support and electrical functionality. These intermediary layers enable precise positioning and connection of high-speed signals while maintaining manufacturability through established lamination and via formation processes

Inventive Principle:
Principle #24Intermediary (Mediator)

3Volume of moving object

If product size is reduced to meet market demands, then competitiveness is improved, but cost reduction becomes more difficult

Engineering Contradiction:
Improveproduct sizeVSAvoidcost reduction
Core Design Contradiction:
Volume of moving objectVSEase of manufacture

Solution Approach 1:

The organic material layers serve multiple functions simultaneously - providing electrical insulation, mechanical support, signal routing pathways, and structural alignment features. This multi-functionality reduces the need for separate components and assembly steps, lowering manufacturing costs despite the reduced package size and increased functionality

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8304286B2Integrated circuit packaging system with shielded package and method of manufacture thereof
Publication Date: 2012.11.06 STATS CHIPPAC LTD
  • US8304286B2 patent drawing
  • US8304286B2 patent drawing
  • US8304286B2 patent drawing

AI summary

A method of manufacture of an integrated circuit packaging system includes: providing a substrate assembly having a connection path; mounting a base device over the substrate assembly with a mount layer; mounting a stack device over the base device and having a stack die and a stack-organic-material; forming a stack-through-via in the stack-organic-material of the stack device and connected to the stack die and the substrate assembly; and applying a shield layer directly on a planarized surface of the stack-through-via partially exposed from the stack-organic-material.