Shielded Bottom-Source Trench MOSFET for Lower Gate-Drain Capacitance

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Solution Overview

Problem

Current Inverted-trench grounded Field Effect Transistors (iT-FETs) face high gate to drain capacitance and high Resistance from drain to source in the on state (Rds-on), leading to slower switching speeds and complex, expensive manufacturing processes.

Innovation Solution

The implementation of a combination source-body short and shield electrode structure in iT-FETs, where the shield electrode reduces the coupling of the drain to the gate, thereby decreasing Miller's effects and enhancing switching speed, and the use of a trench gate design with a recessed gate to minimize gate-drain capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a bottom source Inverted-trench grounded Field Effect Transistor (iT-FET) design is used to enable three-dimensional stacking, then device stacking capability is improved, but gate to drain capacitance increases leading to slower switching speeds

Engineering Contradiction:
Improvedevice stacking capabilityVSAvoidswitching speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

A shield electrode is introduced as an intermediary element positioned between the gate and drain regions. This shield electrode reduces the capacitive coupling between gate and drain by acting as a electrostatic barrier, thereby decreasing the Miller effect and enabling faster switching speeds while maintaining the bottom source stacking-capable structure

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If a bottom source Inverted-trench grounded Field Effect Transistor (iT-FET) design is used to enable three-dimensional stacking, then device stacking capability is improved, but Resistance from drain to source in the on state (Rds-on) increases

Engineering Contradiction:
Improvedevice stacking capabilityVSAvoidon-state resistance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The invention transitions from a planar electrode arrangement to a three-dimensional configuration where the shield electrode extends vertically between the gate and drain regions. This dimensional change allows the shield to effectively reduce capacitive coupling without occupying lateral space that would compromise the channel and increase Rds-on

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If current manufacturing processes for iT-FETs are used, then device functionality is achieved, but the process flow becomes complicated and expensive

Engineering Contradiction:
Improvedevice functionalityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The shield electrode formation is merged with the existing gate trench fabrication process. The shield electrode is formed in the same trench structure as the gate, utilizing the same etching and deposition steps, thereby eliminating separate manufacturing process steps and reducing overall complexity and cost

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration results in improved switching speeds, reduced Rds-on, and a simpler, less costly manufacturing process, allowing for higher device density and faster switching times with lower gate-drain capacitance.

Implementation Method 1

high gate to drain capacitance leading to slower switching speeds

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

the shield electrode reduces the coupling of the drain to the gate, thereby decreasing Miller's effects

Methodology Applied
Scientific EffectMiller's effects: Parasitic Capacitance

Data Source

PatentUS11869967B2Bottom source trench MOSFET with shield electrode
Publication Date: 2024.01.09 ALPHA & OMEGA SEMICON INT LP
  • US11869967B2 patent drawing
  • US11869967B2 patent drawing
  • US11869967B2 patent drawing

AI summary

An improved inverted field-effect-transistor semiconductor device and method of making thereof may comprise a source layer on a bottom and a drain disposed on a top of a semiconductor substrate and a vertical current conducting channel between the source layer and the drain controlled by a trench gate electrode disposed in a gate trench lined with an insulating material. A heavily doped drain region is disposed near the top of the substrate surrounding an upper portion of a shield trench and the gate trench. A doped body contact region is disposed in the substrate and surrounding a lower portion of the shield trench. A shield electrode extends upward from the source layer in the shield trench for electrically shorting the source layer and the body region wherein the shield structure extends upward to a heavily doped drain region and is insulated from the heavily doped drain region to act as a shield electrode.