Shielded Wafer Level Chip Scale Package Grounding via Seal Ring
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Solution Overview
Problem
Radio frequency devices face interference from undesired electromagnetic radiation, which affects their performance and that of surrounding circuitry, leading to diminished performance and increased manufacturing costs due to the need for extensive shielding of entire packages.
Innovation Solution
A shielded wafer level chip scale package design featuring a metal shield connected to ground via redistribution layers or vias, specifically targeting the die to shield it from stray power and electromagnetic radiation, allowing for reduced package size and cost by shielding only essential components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If extensive shielding of entire packages is used, then electromagnetic interference protection is improved, but manufacturing cost increases
Solution Approach 1:
The patent divides the shielding approach from package-level to die-level. Individual dies receive targeted shielding structures (metal shields connected to ground via vias) rather than shielding the entire package, thereby reducing material usage and manufacturing cost while maintaining EMI protection for critical components.
Solution Approach 2:
The patent applies shielding selectively to specific dies that are susceptible to or generate electromagnetic interference, rather than uniformly shielding all components in the package. This localized approach optimizes EMI protection where needed while minimizing unnecessary shielding elsewhere, reducing overall manufacturing cost.
2Object-affected harmful factors
If extensive shielding of entire packages is used, then electromagnetic interference protection is improved, but package size increases
Solution Approach 1:
The shielding is segmented to cover only individual dies rather than the entire package volume. The metal shields are placed directly over susceptible dies and connected to ground through vias in the substrate, eliminating the need for large package-level shield enclosures and reducing overall package size.
Solution Approach 2:
The patent transitions from three-dimensional package-level shielding enclosures to two-dimensional planar metal shields deposited directly on die surfaces. This dimensional reduction allows shielding functionality to be integrated within the existing package footprint without significantly increasing volume.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively reduces electromagnetic interference while minimizing material and processing costs by selectively shielding individual components, enhancing the performance and reducing the size of electronic devices.
Implementation Method 1
A metal shield is disposed over the die, the metal shield in contact with a peripheral boundary of the substrate and connected to ground via the plurality of interconnect members. The metal shield is configured to shield the die from stray power and electromagnetic radiation.
Data Source
AI summary
An electronics package for use in a module of an electronic device has a die, and a plurality of interconnect members disposed under the die. A seal ring extends along an outer boundary of the die. A metal shield is disposed over the die, the metal shield in contact with a peripheral boundary of the die and connected to ground via the seal ring and the plurality of interconnect members. The metal shield shields the die from stray power and electromagnetic radiation.