Shielding Gate High-Voltage Transistor for Field Inversion Control
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Solution Overview
Problem
Conventional high-voltage transistors in semiconductor devices experience field inversion due to electric field penetration through element isolation insulating films, leading to current leakage and instability, which hinders miniaturization efforts.
Innovation Solution
The implementation of shielding gates on the element isolation regions between high-voltage transistors, applying a reference potential or a potential with a different polarity to prevent field inversion and enhance isolation, thereby reducing the need for increased isolation depth and distance between transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the depth of the element isolation insulating film is increased to prevent field inversion, then reliability is improved, but device area increases which is disadvantageous for miniaturization
Solution Approach 1:
A shielding gate is introduced as an intermediary structure between adjacent high-voltage transistors. This shielding gate applies a reference potential to the element isolation insulating film, actively preventing electric field penetration and field inversion without requiring increased isolation depth or distance, thus maintaining compact device area while ensuring reliability
Solution Approach 2:
The invention changes the electrical parameter (potential) applied to the element isolation insulating film by introducing a shielding gate connected to a reference potential. This parameter change actively counteracts the electric field penetration effect, preventing field inversion while allowing the use of shallower isolation structures and smaller transistor spacing
2Reliability
If the distance between adjacent high-voltage transistors is increased to prevent field inversion, then reliability is improved, but device area increases which is disadvantageous for miniaturization
Solution Approach 1:
The shielding gate serves as an intermediary that actively manages the electric field between closely-spaced transistors. By applying reference potential through the shielding gate, the electric field distribution is controlled, preventing field inversion even when transistors are placed close together, thus enabling miniaturization without sacrificing reliability
3Reliability
If isolation transistors are added between adjacent high-voltage transistors to prevent field inversion, then reliability is improved, but device complexity and area increase
Solution Approach 1:
The invention extracts the field inversion prevention function from the transistor structure itself and implements it through a separate shielding gate mechanism. This eliminates the need for additional isolation transistors, reducing device complexity while maintaining the field inversion prevention capability through the shielding gate's reference potential application
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively prevents field inversion and punchthrough leaks, improving reliability and allowing for reduced element isolation area, which is advantageous for miniaturization and reducing cell area in NAND flash memory devices.
Implementation Method 1
electric lines of force extend into the element isolation insulating film disposed between the adjacent transistors to make unstable the potentials of the gate and source/drain of the adjacent transistor
Implementation Method 2
shielding gates which are provided on an element isolation region in spaces between the transistors adjacent in the gate-width direction and gate-length direction and used to apply one of reference potential and potential of a polarity different from that of potential applied to the gate of the transistor
Data Source
AI summary
A semiconductor device includes a plurality of high-voltage insulated-gate field-effect transistors arranged in a matrix form on the main surface of a semiconductor substrate and each having a gate electrode, a gate electrode contact formed on the gate electrode, and a wiring layer which is formed on the gate electrode contacts adjacent in a gate-width direction to electrically connect the gate electrodes arranged in the gate-width direction. And the device includes shielding gates provided on portions of an element isolation region which lie between the transistors adjacent in the gate-width direction and gate-length direction and used to apply reference potential or potential of a polarity different from that of potential applied to the gate of the transistor to turn on the current path of the transistor to the element isolation region.