Semiconductor Shielding Layer via Conductive Vias
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Miniaturization and higher speed operation in semiconductor devices lead to inter-device interference, particularly in systems-in-package (SiP) with integrated passive devices (IPDs), which is challenging to address with existing shielding technologies that are time-consuming and costly to manufacture.
Innovation Solution
A semiconductor device design that includes a substrate with a first insulating layer, an IPD structure formed over it, conductive vias through the IPD and substrate, and a shielding layer extending from the back surface into these vias to reduce electromagnetic interference (EMI) and radio frequency interference (RFI).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a shielding layer is formed over the IPD structure to reduce electromagnetic interference, then interference protection is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent combines the shielding layer function with the existing substrate structure by forming the shielding layer directly on the back surface of the substrate. This merging approach eliminates the need for separate ground shields and reduces the number of discrete components, thereby maintaining EMI protection while simplifying the overall device structure and manufacturing process
Solution Approach 2:
The shielding layer serves multiple functions simultaneously: it provides electromagnetic interference protection for the IPD structure, acts as a ground reference plane, and serves as a mounting surface for external components. This multi-functionality reduces the need for additional separate structures, simplifying manufacturing while achieving comprehensive EMI protection
2Volume of moving object
If the device is miniaturized to reduce footprint, then device size is reduced, but inter-device interference increases
Solution Approach 1:
The patent addresses inter-device interference in miniaturized devices by extending the shielding layer from the back surface of the substrate vertically into the third dimension. This dimensional approach creates shielding barriers without increasing the horizontal footprint, thereby maintaining compact device size while effectively blocking electromagnetic interference between closely spaced components
3Object-affected harmful factors
If existing shielding technologies are used to protect against interference, then EMI protection is improved, but manufacturing time and cost increase
Solution Approach 1:
The shielding layer is formed during the substrate preparation stage, before the IPD structure is assembled or tested. This preliminary formation of the shielding layer integrates EMI protection into the base manufacturing process rather than requiring separate post-assembly shielding steps, thereby reducing total manufacturing time while maintaining effective interference protection
Solution Approach 2:
The patent merges the shielding layer formation with the substrate fabrication process itself, using the same manufacturing equipment and materials. This consolidation eliminates the need for separate shielding component procurement, assembly, and testing steps, significantly reducing manufacturing time and cost while achieving the same EMI protection level
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces inter-device interference by forming a shielding layer around the back surface and sides of the semiconductor wafer, minimizing EMI and RFI without the need for separate ground shields, thus enhancing device performance and reducing manufacturing costs.
Implementation Method 1
a shielding layer is formed over the second surface of the substrate and extending into the second via to the conductive via
Data Source
AI summary
A semiconductor wafer has an insulating layer over a first surface of the substrate. An IPD structure is formed over the insulating layer. The IPD structure includes a MIM capacitor and inductor. A conductive via is formed through a portion of the IPD structure and partially through the substrate. The conductive via can be formed in first and second portions. The first portion is formed partially through the substrate and second portion is formed through a portion of the IPD structure. A first via is formed through a second surface of the substrate to the conductive via. A shielding layer is formed over the second surface of the substrate wafer. The shielding layer extends into the first via to the conductive via. The shielding layer is electrically connected through the conductive via to an external ground point. The semiconductor wafer is singulated through the conductive via.