Shielding Layer Reduces Parasitic Capacitance in Display Pixel Circuits
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Solution Overview
Problem
Current display apparatuses face challenges in achieving high-quality image display due to parasitic capacitance issues between data lines and node connection lines, which affect the performance of thin-film transistors and overall display quality.
Innovation Solution
Incorporating a shielding conductive layer between the data line and the node connection line, connected to the driving gate electrode, to minimize parasitic capacitance and maintain a stable voltage in the pixel circuit, thereby improving display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a data line and node connection line are arranged close to each other in the pixel circuit, then the area of the pixel circuit is reduced, but parasitic capacitance increases between the data line and node connection line
Solution Approach 1:
A shielding conductive layer is introduced as an intermediary element between the data line and node connection line. This shielding layer is connected to a fixed potential (ground or power supply voltage) and electrically isolates the data line from the node connection line, thereby reducing parasitic capacitance while allowing the lines to be positioned closer together
Solution Approach 2:
The harmful parasitic capacitance effect is extracted and isolated by introducing a dedicated shielding layer that captures and contains the electromagnetic interference between the data line and node connection line, preventing it from affecting the pixel circuit performance
2Productivity
If the node connection line is positioned close to the data line, then the layout density is improved, but RC delay increases due to parasitic capacitance
Solution Approach 1:
The shielding conductive layer acts as a mediator that reduces the capacitive coupling between the data line and node connection line, thereby reducing RC delay and allowing higher layout density without sacrificing signal transmission speed
3Ease of manufacture
If the node connection line is arranged near the data line, then the manufacturing process is simplified, but leakage current increases due to parasitic capacitance
Solution Approach 1:
The shielding layer serves as a protective intermediary that prevents parasitic capacitance-induced leakage current while maintaining the simplified manufacturing process. The shielding layer can be formed using the same conductive material and deposition process as other conductive layers in the pixel circuit
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The shielding conductive layer effectively reduces parasitic capacitance and maintains a low voltage in the pixel circuit, enhancing the grayscale control of the organic light-emitting device and improving the overall display quality by preventing RC delay and leakage currents.
Implementation Method 1
parasitic capacitance issues between data lines and node connection lines
Data Source
AI summary
A display apparatus includes a substrate, a driving thin-film transistor arranged on the substrate and including a driving semiconductor layer and a driving gate electrode, a first scanning line arranged on the first substrate and which extends in a first direction, a data line which extends in a second direction that intersects with the first direction, a node connection line arranged in the same layer as the first scanning line, and a shielding conductive layer arranged between the data line and the node connection line and disposed in the same layer as the driving gate electrode, where an end of the node connection line is connected to the driving gate electrode through a first node contact hole.