Shielding Layer Blocks Plasma in Semiconductor Memory Passivation

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Solution Overview

Problem

Semiconductor memory devices face deterioration of memory cell characteristics due to Plasma-Induced Damage (PID) during the passivation process, leading to inconsistent operation characteristics such as threshold voltages and reset currents across the memory cells.

Innovation Solution

Incorporating a shielding layer made of metallic materials, such as Ti, W, Al, or their nitrides, which is electrically isolated and surrounds the cell mat, capable of blocking plasma, thereby protecting the memory cells from damage during the passivation process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a passivation process is performed on semiconductor memory devices, then the device structure is protected and completed, but plasma-induced damage occurs to memory cells causing deterioration of characteristics

Engineering Contradiction:
Improvememory cell characteristics consistencyVSAvoidplasma-induced damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A shielding layer made of plasma-blocking material is introduced as an intermediary between the plasma environment and the memory cells. This shielding layer selectively blocks plasma from reaching the memory cells while allowing the passivation process to proceed, thereby preventing plasma-induced damage without interfering with the protective passivation function.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The passivation structure is segmented into multiple functional layers: a lower passivation layer that provides structural protection, a shielding layer that blocks plasma, and an upper passivation layer that completes the protection. This segmentation allows each layer to perform its specific function independently, with the shielding layer specifically addressing the plasma damage issue.

Inventive Principle:
Principle #1Segmentation

2Reliability

If a shielding layer is added to block plasma, then memory cells are protected from plasma damage, but device structure becomes more complex

Engineering Contradiction:
Improvememory cell characteristics consistencyVSAvoiddevice structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The shielding layer is merged with the existing passivation structure by positioning it between the lower and upper passivation layers. This integration allows the shielding function to be added without creating a completely separate structure, thereby limiting the increase in device complexity while achieving plasma protection.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shielding layer serves as a thin intermediary layer that provides plasma blocking functionality without adding significant structural complexity. By using a material specifically designed for plasma blocking and positioning it strategically, the protection function is achieved with minimal additional structural elements.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The shielding layer effectively prevents plasma-induced damage to the memory cells, maintaining consistent operation characteristics and improving the overall performance of the semiconductor memory devices by isolating them from plasma exposure.

Implementation Method 1

a shielding layer disposed in the insulating layer, the shielding layer overlapping at least a second portion of the cell mat, the shielding layer being capable of blocking plasma

Methodology Applied
Scientific EffectPlasma blocking: Plasma

Data Source

PatentUS10181444B2Electronic device and method for fabricating the same
Publication Date: 2019.01.15 SK HYNIX INC
  • US10181444B2 patent drawing
  • US10181444B2 patent drawing
  • US10181444B2 patent drawing

AI summary

An electronic device includes a semiconductor memory, wherein the semiconductor memory may include: a cell mat disposed over a substrate, the cell mat including a plurality of memory cells; an insulating layer disposed over the cell mat; a conductive pattern disposed over the insulating layer, the conductive pattern overlapping a first portion of the cell mat without overlapping a second portion of the cell mat; and a shielding layer disposed in the insulating layer, the shielding layer overlapping at least the second portion of the cell mat, the shielding layer being capable of blocking plasma.