Shielding Layer in Post-Passivation Interconnect Structure

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Solution Overview

Problem

As the density of active and passive devices in integrated circuits increases, the complexity of post-passivation interconnect (PPI) lines in wafer level chip scale packaging (WLCSP) grows, leading to challenges in managing electrical interference and signal transmission effectively.

Innovation Solution

The implementation of a semiconductor device structure that includes a first shielding layer positioned between signal lines and electrical circuitry, equi-potentially connected to a ground line, to shield against electrical coupling and interference, along with a PPI structure that includes signal and ground lines, and redistribution layers, formed using materials like copper and aluminum.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the density of active and passive devices is increased, then the functionality and integration of the circuit is improved, but the complexity of PPI lines and electrical interference increases

Engineering Contradiction:
Improvecircuit functionalityVSAvoidPPI line complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent divides the PPI structure into multiple segments by introducing intermediate shielding layers and ground lines between signal lines. This segmentation isolates different signal paths, reducing interference while maintaining the ability to handle increased device density and circuit functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediate shielding layers and ground lines as intermediary elements between signal lines. These intermediaries act as barriers that block electrical coupling and interference, allowing the circuit to support higher device density without proportionally increasing PPI line complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If more PPI lines are added to handle increased device density, then the interconnect capability is improved, but the electrical interference and signal transmission quality deteriorates

Engineering Contradiction:
Improvenumber of interconnectionsVSAvoidsignal transmission quality
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent segments the PPI structure by inserting shielding layers and ground lines between signal lines. This segmentation allows multiple interconnections to coexist while isolating their electrical fields, thereby maintaining signal transmission quality despite the increased number of interconnections.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent converts the potentially harmful electrical coupling between adjacent PPI lines into a beneficial shielding effect by introducing ground lines and shielding layers. These elements absorb or redirect interference, transforming the harmful effect of close spacing into a protective mechanism that maintains signal integrity.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Reliability

If shielding layers are added to reduce interference, then the electrical performance is improved, but the device complexity and manufacturing process increases

Engineering Contradiction:
Improveelectrical performanceVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the shielding function with existing PPI structure elements by integrating shielding layers and ground lines into the interconnect architecture. This merging approach improves electrical performance while avoiding the need for completely separate shielding structures, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent designs the shielding layers and ground lines to serve multiple functions: they provide electrical shielding, establish reference potentials, and contribute to the overall interconnect architecture. This multi-functionality improves electrical performance without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Reliability

If shielding layers are positioned close to signal lines, then the interference shielding effect is improved, but the manufacturing precision requirements increase

Engineering Contradiction:
Improveshielding effectivenessVSAvoidlayer alignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent employs ground lines and shielding layers that are equi-potentially connected to create uniform electrical potential regions. This equipotentiality reduces the sensitivity to precise positioning, as the shielding effect is maintained through potential equalization rather than relying solely on tight geometric tolerances.

Inventive Principle:
Principle #12Equipotentiality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances electrical performance by reducing transmission loss and maintaining characteristic impedance similar to comparative examples, while effectively shielding against interference, thus improving the overall electrical performance of the semiconductor device.

Implementation Method 1

a first shielding layer positioned between signal lines and electrical circuitry, equi-potentially connected to a ground line, to shield against electrical coupling and interference

Methodology Applied
Scientific EffectElectrical shielding: Faraday Cage

Data Source

PatentUS9368454B2Semiconductor device with shielding layer in post-passivation interconnect structure
Publication Date: 2016.06.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9368454B2 patent drawing
  • US9368454B2 patent drawing
  • US9368454B2 patent drawing

AI summary

A semiconductor device includes a semiconductor substrate, a dielectric layer, a passivation layer, a protective layer, a post-passivation interconnect (PPI) structure, and a shielding layer. The semiconductor substrate has electrical circuitry. The dielectric layer is formed on the semiconductor substrate. The passivation layer is formed on the dielectric layer. The first protective layer is formed on the passivation layer. The PPI structure is disposed on the first protective layer and has a signal line and a ground line. The shielding layer is disposed over the semiconductor substrate and between the signal line and the electrical circuitry. The shielding layer is substantially equi-potentially connected to the ground line of the PPI structure.