Shielding Pattern for Overlay Inspection Accuracy
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Solution Overview
Problem
The overlay inspection process in semiconductor manufacturing is inaccurate due to step differences between chip regions and scribe lanes, which affect the analysis of diffraction patterns from overlay markings.
Innovation Solution
A semiconductor device design featuring a shielding pattern with parallel bars and lower overlay markings having slits, where the shielding pattern is interposed between the overlay marking and the circuit pattern, ensuring accurate light blocking and alignment during inspection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If overlay marking is placed in the scribe lane to avoid circuit pattern interference, then light diffraction analysis is improved, but step difference between chip region and scribe lane reduces measurement precision
Solution Approach 1:
A shielding pattern is introduced as an intermediary element between the circuit pattern and the overlay marking. This shielding pattern blocks light from the circuit pattern, preventing it from interfering with the overlay inspection, while allowing the overlay marking to remain in the chip region and maintain measurement precision.
Solution Approach 2:
The solution moves the overlay marking from the traditional scribe lane location to the chip region, and compensates for the resulting interference by adding the shielding pattern in a different spatial dimension (between the circuit and marking layers), thus resolving the contradiction through spatial reorganization.
2Measurement precision
If overlay marking extends into the chip region to improve inspection accuracy, then measurement precision is improved, but light reflection from circuit pattern creates harmful interference
Solution Approach 1:
The shielding pattern serves as a mediator that blocks light reflections from the circuit pattern, allowing the overlay marking to extend into the chip region for improved measurement precision without suffering from light interference.
3Measurement precision
If traditional overlay marking without shielding is used, then device complexity is low, but overlay inspection accuracy is insufficient
Solution Approach 1:
By introducing the shielding pattern as an intermediary element, the patent achieves high overlay inspection accuracy. The shielding pattern is designed with simple parallel bars that can be integrated into existing manufacturing processes, balancing the increase in device complexity with the significant improvement in measurement precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the accuracy of the overlay inspection process by blocking light reflections from the circuit pattern, improving the precision of overlay alignment and increasing chip production efficiency.
Implementation Method 1
a light shielding pattern comprising bars of opaque and electrically inactive material in the device, the bars extending over the circuit pattern
Implementation Method 2
The overlay marking may comprise a diffraction grating. Light shown onto the substrate through the overlay marking may be diffracted by the diffraction grating of the overlay marking, captured, and analyzed.
Data Source
AI summary
A semiconductor device includes a circuit pattern on a substrate, a shielding pattern on the circuit pattern and constituted by a plurality of parallel bars, and lower overlay marking on the shielding pattern and constituted by a plurality of parallel bars which define parallel slits between the bars. The pitch of the bars of the shielding pattern is smaller than the pitch of the bars of the lower overlay marking.