Shift Array Circuit Reducing AI Neural Network Area and Power
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Solution Overview
Problem
Existing shift circuits in artificial intelligence neural networks require a large circuit area and complex wiring due to numerous input terminals, and they need additional decoder circuits to process shift operations, which complicates the design and increases power consumption.
Innovation Solution
A shift array circuit is designed with multiple shift arrays that receive bits of shift data, allowing each array to perform a shift operation on input data based on a corresponding shift bit, reducing the need for extensive decoding and simplifying the circuit structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a shift circuit is constructed using multiplexers that receive all bits of input data and select bits based on shift data values, then the shift operation can be performed, but the circuit area becomes large and the wiring structure becomes complicated due to the numerous input terminals of the multiplexers
Solution Approach 1:
The shift circuit is divided into multiple shift arrays, where each shift array processes a specific portion of the input data. This segmentation reduces the number of input terminals each multiplexer needs to handle, thereby reducing the overall circuit area and simplifying the wiring structure while maintaining the shift operation capability.
Solution Approach 2:
The patent introduces a new dimensional organization by arranging shift arrays in a structured layout with specific connectivity patterns. This dimensional reorganization allows for more efficient resource sharing and reduces the complexity of wiring connections between components, effectively reducing the circuit area required for the same functionality.
2Ease of operation
If a decoder is added to provide selection signals to the multiplexers, then the shift operation can be controlled, but the device complexity increases
Solution Approach 1:
The patent extracts and eliminates the decoder component from the traditional shift circuit architecture. Instead of using a decoder to generate selection signals, the shift arrays are directly controlled by the shift data, simplifying the overall circuit structure and reducing device complexity while maintaining operational control.
Solution Approach 2:
The shift arrays are designed to be multi-functional, handling both data processing and control signal generation within a single structure. This universal design eliminates the need for separate decoder circuits, as the shift arrays can directly interpret and respond to shift data values, thereby reducing device complexity.
3Ease of operation
If a decoder is added to decode the shift data, then the shift operation can be controlled, but the power consumption increases
Solution Approach 1:
The patent removes the power-consuming decoder component from the circuit architecture. By eliminating the decoder, the overall power consumption of the shift circuit is reduced, as decoders typically require significant power to decode multiple input signals into multiple output selection signals.
Solution Approach 2:
The shift arrays are designed to self-configure based on the shift data values without requiring external decoding. Each shift array can directly interpret the shift data and perform the appropriate shift operation, eliminating the need for additional power-consuming control logic and achieving power-efficient operation.
Data Source
AI summary
A shift array circuit generates output data having the number of bits greater than the number of bits of target data by shifting the target data by a bit corresponding to a value of shift data. The shift array circuit includes a plurality of shift arrays. The plurality of shift arrays is configured to receive bits of the shift data for each bit and each configured to perform a shift operation on input data that is input to each of the plurality of shift arrays by a shift bit corresponding to an input bit, among the bits of the shift data.