Shift Register AH Control Circuit for Simultaneous Gate Output
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Solution Overview
Problem
Existing gate drivers in flat panel display devices, particularly in OLED devices, are limited in applying simultaneous emission compensation due to their sequential output structure, which restricts the ability to compensate for characteristic deviations of driving transistors across all pixels in a single frame.
Innovation Solution
A shift register with multiple stages, each comprising a pull-up transistor, a pull-down transistor, and a flip-flop, synchronized with clock and start signals, and an AH control circuit to output high-level signals to all gate lines for one frame, enabling sequential and simultaneous gate output voltage generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a sequential output structure is used in the gate driver, then the device complexity is reduced, but the ability to apply simultaneous emission compensation is lost
Solution Approach 1:
The gate driver is designed to dynamically switch between sequential output mode and simultaneous output mode. The control circuit receives compensation mode signals and clock signals to adjust the operating mode, allowing the system to adapt between different compensation requirements while maintaining a unified hardware structure.
Solution Approach 2:
The gate driver circuit is designed with multi-functionality to support both sequential emission driving and simultaneous emission compensation. By incorporating mode selection logic and flexible clock signal handling, the same hardware structure can perform multiple compensation types without requiring separate dedicated circuits for each mode.
2Measurement precision
If a sequential output structure is used, then the manufacturing precision requirements are simplified, but the compensation precision for driving transistor deviations is reduced
Solution Approach 1:
The shift register incorporates dynamic control mechanisms that allow it to switch between sequential and simultaneous output modes based on compensation requirements. This dynamic capability enables high-precision simultaneous compensation when needed while maintaining the simpler sequential operation when appropriate, all within a unified circuit design.
3Productivity
If the gate driver outputs high level voltage sequentially for one horizontal period, then the ease of operation is maintained, but the productivity of the compensation process is reduced
Solution Approach 1:
The gate driver implements dynamic mode switching capability, allowing the system to operate in sequential mode for normal display operations and switch to simultaneous output mode when compensation is required. This dynamic adaptability enables high-speed simultaneous compensation without permanently complicating the control structure, as the circuit reverts to simple sequential operation during standard display modes.
Data Source
AI summary
A shift register includes a plurality of stages each having a pull-up transistor, a pull-down transistor and a flip-flop, the plurality of stages outputting high level output voltages sequentially for one horizontal period in response to at least one clock signal and a start signal, and an AH control circuit connected to input terminals and output terminals of the plurality of stages to control output signals of all the stages into a high level for one frame.