Shift Register Anti-Crosstalk Circuit for Gate Drive Stability
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Solution Overview
Problem
In the field of display technology, particularly in liquid crystal display and OLED panels, the existing gate drive circuits face challenges in reducing chip area, leading to increased costs and inefficiencies due to issues with crosstalk in shift register units, which affect the display quality and stability of the gate drive circuit.
Innovation Solution
A shift register unit is designed with a first input circuit, a second input circuit, an output circuit, and an anti-crosstalk circuit to prevent the second node from changing levels when it is in a floating state, thereby avoiding erroneous input signals and ensuring stable operation by using transistors and phase inverters to control signal levels and prevent crosstalk.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the gate drive circuit integrates more functions to reduce chip area, then the chip area is reduced, but the crosstalk between signals increases affecting reliability
Solution Approach 1:
The gate drive circuit is divided into multiple independent shift register units, each with separate input circuits for different signals. The first input circuit receives first signals and the second input circuit receives second signals, physically separating the signal paths to prevent crosstalk while maintaining integration benefits.
Solution Approach 2:
A control circuit acts as an intermediary between the first and second input circuits. It detects the signal levels and selectively enables or disables the second input circuit based on the state of the first signal, preventing erroneous signal transmission and crosstalk.
2Adaptability or versatility
If the shift register unit processes multiple signals simultaneously, then the functionality is improved, but the signal crosstalk and erroneous operations increase
Solution Approach 1:
The second input circuit is designed to be dynamically controllable, enabling it to receive second signals only when the first signal is at a specific level (second level). This dynamic control mechanism allows the circuit to adapt its functionality based on real-time signal conditions, preventing crosstalk while maintaining versatile signal processing capability.
Solution Approach 2:
The control circuit continuously monitors the level of the first signal and uses this feedback to control the operation of the second input circuit. When the first signal is at the second level, the control circuit enables the second input circuit; when the first signal changes to the first level, the control circuit disables the second input circuit, preventing erroneous signal transmission.
3Ease of manufacture
If the circuit structure is simplified to reduce chip area, then the manufacturing cost is reduced, but the crosstalk prevention capability is weakened
Solution Approach 1:
The control circuit serves multiple functions: it detects the level of the first signal, controls the enabling/disabling of the second input circuit, and prevents crosstalk between different signal paths. This multi-functional design allows effective crosstalk prevention without significantly increasing circuit complexity or manufacturing cost.
Data Source
AI summary
A shift register unit, a gate drive circuit, a display device and a driving method are disclosed. The shift register unit includes a first input circuit, a second input circuit, an output circuit and an anti-crosstalk circuit. The first input circuit is configured to input a first input signal to a first node; the second input circuit is configured to input a second input signal to the first node in a situation where the second node is at a first level and to stop inputting the second input signal to the first node in a situation where the second node is at a second level; the output circuit is configured to output or not output an output signal; the anti-crosstalk circuit is configured to prevent a level of the second node from becoming the first level in a situation where the second node is at the second level.