Shift Register Integration on Array Substrate for LCD Gate Driving

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional liquid crystal display (LCD) array substrates require separate gate driver chips attached to flexible printed circuit boards or glass substrates, leading to increased costs and circuit board size, which can be reduced by integrating a shift register directly onto the array substrate.

Innovation Solution

A shift register is formed directly on the array substrate, comprising multiple shift register units divided into three groups, each connected to specific gate lines and controlled by alternating clock signals, with signal and reset connections between units, allowing for efficient gate driving signal generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a separate gate driver chip is attached to a flexible printed circuit board or glass substrate, then the gate driving function is achieved, but the circuit board size and cost increase

Engineering Contradiction:
Improvegate driving functionVSAvoidcircuit board size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The gate driver circuit is merged with the array substrate by fabricating shift register units directly on the substrate using TFT technology. This integration eliminates the need for separate gate driver chips and flexible printed circuit boards, thereby reducing overall circuit board size while maintaining reliable gate driving functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The array substrate is designed to serve dual functions: as the display substrate and as the gate driver circuit substrate. The shift register units fabricated on the array substrate can drive multiple gate lines, enabling the substrate to perform both display and gate driving functions simultaneously.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If a separate gate driver chip is attached to a flexible printed circuit board or glass substrate, then the gate driving function is achieved, but manufacturing cost increases

Engineering Contradiction:
Improvegate driving functionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The gate driver circuit is merged with the array substrate by fabricating shift register units directly on the substrate using TFT technology. This integration eliminates the need for separate gate driver chips and flexible printed circuit boards, thereby reducing overall circuit board size while maintaining reliable gate driving functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The array substrate is designed to serve dual functions: as the display substrate and as the gate driver circuit substrate. The shift register units fabricated on the array substrate can drive multiple gate lines, enabling the substrate to perform both display and gate driving functions simultaneously.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8508458B2Array substrate and shift register
Publication Date: 2013.08.13 BOE TECHNOLOGY GROUP CO LTD
  • US8508458B2 patent drawing
  • US8508458B2 patent drawing
  • US8508458B2 patent drawing

AI summary

An array substrate and a shift register directly fabricated thereon are provided. The shift register comprises a plurality of shift register units each connected to respective one of gate lines of the array substrate. The plurality of shift register units are divided into three groups. As to any two adjacent shift register units of each group, a signal output terminal of the following shift register unit is connected to a reset signal input terminal of the preceding shift register unit, and a signal output terminal of the preceding shift register unit is connected to a start voltage timing signal input terminal of the following shift register unit. Each group of shift register units are controlled by two clock signals, and the two clock signals alternately control two adjacent shift register units of each group. Both the first shift register unit and the third shift register unit are connected to a first start voltage timing signal input terminal, and the second shift register unit is connected to a second start voltage timing signal input terminal.