Shift Register Unit With Autonomous Reset Circuit

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Solution Overview

Problem

Current Gate on Array (GOA) technologies for liquid crystal panels suffer from poor display performance due to the cascaded connection of shift register units, where an abnormal shift register unit affects multiple stages, leading to serious operational issues.

Innovation Solution

A shift register unit with an integrated reset signal control circuit that generates a reset control signal using both the output signal and reset signal, allowing for self-reset operations without relying on cascaded output signals, thereby isolating the abnormality and preventing mutual influence among units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If cascade connection is used for shift register units, then device complexity is reduced and ease of manufacture is improved, but reliability deteriorates because abnormality in one unit affects multiple stages

Engineering Contradiction:
Improveease of manufactureVSAvoidreliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The gate drive circuit is segmented into multiple independent shift register units, each capable of autonomous reset operation. By dividing the circuit into independent functional blocks with individual reset control, the system achieves both manufacturing simplicity and enhanced reliability, as failures in one segment do not propagate to others.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each shift register unit is equipped with self-reset capability through integrated reset control circuits that can autonomously reset the unit without requiring external intervention or affecting adjacent units. This self-service mechanism ensures that abnormality in one unit does not compromise the operation of other units, thereby improving reliability while maintaining manufacturing simplicity.

Inventive Principle:
Principle #25Self-service

2Reliability

If integrated reset control circuit is added to each shift register unit, then reliability is improved by enabling independent reset operations, but device complexity increases

Engineering Contradiction:
ImprovereliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The reset control circuit is merged with the shift register unit structure, sharing common components such as transistors and capacitors where possible. This integration approach allows each unit to have independent reset capability while avoiding redundant components, thereby improving reliability without proportionally increasing device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The reset control circuit is designed with universal functionality that can serve multiple purposes: resetting the current shift register unit, controlling output timing, and coordinating with adjacent units. This multi-functionality reduces the need for separate dedicated components, achieving independent reset operations without excessive complexity increase.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11315496B2Shift register unit and driving method thereof, gate drive circuit and display device
Publication Date: 2022.04.26 CHONGQING BOE OPTOELECTRONICS
  • US11315496B2 patent drawing
  • US11315496B2 patent drawing
  • US11315496B2 patent drawing

AI summary

A shift register unit and a driving method thereof, a gate drive circuit and a display device are provided. The shift register unit includes: an input circuit, connected to a pull-up node, and configured to charge the pull-up node according to an input signal; an output circuit, connected to the pull-up node and an output terminal, and configured to output an output signal to the output terminal under control of a voltage of the pull-up node; a reset circuit, connected to the pull-up node, and configured to reset the pull-up node; and a reset signal control circuit, connected to a first reset terminal and the reset circuit, and configured to generate and output a reset control signal according to a reset control input signal and a reset signal provided by the first reset terminal; the reset control signal is configured to control the reset circuit to perform a reset operation.