Shift Register Circuit Bidirectional Scanning Reset Mechanism
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Bidirectional scanning shift register circuits fail to generate output signals when the scanning direction is switched due to increased offset time of pull-up nodes, leading to display abnormalities.
Innovation Solution
A shift register circuit with N cascaded units, where odd-numbered stages receive a first clock signal and even-numbered stages receive a second clock signal, utilizing switching units to manage gate drive and reset signals effectively during forward and reverse scans, ensuring normal reset and output signal generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a bidirectional scanning shift register circuit is used, then the display device can achieve narrow bezel design and improved process yield, but the circuit fails to generate output signal when scanning direction is switched
Solution Approach 1:
The patent applies preliminary action by resetting the pull-up node before the scanning direction switch occurs. The reset circuit is activated in advance to clear the offset time accumulation, ensuring that when the scanning direction changes, the circuit is in a known good state and can generate output signals normally. This prevents the failure mode where accumulated offset time causes output signal generation failure during direction switching.
Solution Approach 2:
The patent introduces a reset circuit as an intermediary component between the shift register units and the scanning control logic. This reset circuit acts as a mediator that actively manages the pull-up node state, intervening to clear offset time accumulation before direction switches occur. The intermediary reset mechanism bridges the gap between the bidirectional scanning requirement and the reliable output signal generation, resolving the contradiction by adding a controlling element that prevents the harmful effect.
2Ease of manufacture
If cascaded shift register units are used for gate drive, then manufacturing cost is reduced and process yield is improved, but offset time increases causing signal generation failure
Solution Approach 1:
The patent extracts the offset time accumulation problem from the normal signal transmission path by introducing a separate reset circuit. Instead of trying to reduce the inherent offset time in the cascaded structure, the solution extracts and removes the accumulated offset time periodically through the reset mechanism. This allows the cascaded shift register units to maintain their manufacturing advantages while the extracted reset function eliminates the harmful time accumulation effect.
Solution Approach 2:
The patent applies discarding and recovering by periodically discarding the accumulated offset time through the reset circuit. The pull-up node state, which has accumulated offset time during scanning, is discarded (reset to a known state) before direction switching occurs. This discarding of the degraded state allows the circuit to recover and function properly in the next scanning direction, maintaining the benefits of cascaded units while eliminating their time accumulation drawback.
3Adaptability or versatility
If the shift register circuit scans in reverse direction, then coverage can be extended, but display abnormalities occur due to improper voltage levels
Solution Approach 1:
The patent applies preliminary action by resetting the pull-up node voltage levels before the reverse scanning direction is initiated. The reset circuit is activated in advance to ensure proper voltage levels are established, preventing display abnormalities that would occur if reverse scanning started with improper voltage states. This preliminary reset action ensures the circuit is ready for bidirectional operation without harmful effects.
Solution Approach 2:
The patent applies preliminary anti-action by using the reset circuit to counteract the potential harmful voltage level states before reverse scanning occurs. Instead of allowing improper voltage levels to develop and then correcting them, the reset circuit proactively prevents the harmful state from occurring by resetting the pull-up node to correct voltage levels before the direction switch, thereby preventing display abnormalities in advance.
Data Source
AI summary
A shift register circuit including: a first switching unit, a second switching unit, a third switching unit, a fourth switching unit, a fifth switching unit, a sixth switching unit, a seventh switching unit, and an eighth switching unit.